DSPIC30F2010-30I/SOG Microchip Technology, DSPIC30F2010-30I/SOG Datasheet - Page 88

• Manufacturer Part Number: DSPIC30F2010-30I/SOG
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/SOG

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F201030ISO

dsPIC30F2010
14.7
Dead time generation may be provided when any of the
PWM I/O pin pairs are operating in the Complementary
Output mode. The PWM outputs use Push-Pull drive
circuits. Due to the inability of the power output devices
to switch instantaneously, some amount of time must
be provided between the turn off event of one PWM
output in a complementary pair and the turn on event of
the other transistor.
14.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead time insertion. As shown in Figure 14-4, the dead
time unit has a rising and falling edge detector con-
nected to the duty cycle comparison output.
14.7.2
The amount of dead time provided by the dead time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value.
FIGURE 14-4:
14.8
An independent PWM Output mode is required for driv-
ing certain types of loads. A particular PWM output pair
is in the Independent Output mode when the corre-
sponding PMOD bit in the PWMCON1 register is set.
No dead time control is implemented between adjacent
PWM I/O pins when the module is operating in the
Independent mode and both I/O pins are allowed to be
active simultaneously.
In the Independent mode, each duty cycle generator is
connected to both of the PWM I/O pins in an output
pair. By using the associated duty cycle register and
the appropriate bits in the OVDCON register, the user
may select the following signal output options for each
PWM I/O pin operating in the Independent mode:
• I/O pin outputs PWM signal
• I/O pin inactive
• I/O pin active
DS70118E-page 86
Dead Time Generators
Independent PWM Output
DEAD TIME GENERATORS
DEAD TIME RANGES
PWMxH
Duty Cycle Generator
PWMxL
DEAD TIME TIMING DIAGRAM
Preliminary
Four input clock prescaler selections have been pro-
vided to allow a suitable range of dead-times, based on
the device operating frequency. The dead time clock
prescaler value is selected using the DTAPS<1:0> and
DTBPS<1:0> control bits in the DTCON1 SFR. One of
four clock prescaler options (T
is selected for the dead time value.
After the prescaler value is selected, the dead time is
adjusted by loading a 6-bit unsigned value into the
DTCON1 SFR.
The dead time unit prescaler is cleared on the following
events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON1 register.
• On any device Reset.
14.9
The PWM module produces single pulse outputs when
the PTCON control bits PTMOD<1:0> = 10. Only edge
aligned outputs may be produced in the Single Pulse
mode. In Single Pulse mode, the PWM I/O pin(s) are
driven to the active state when the PTEN bit is set.
When a match with a duty cycle register occurs, the
PWM I/O pin is driven to the inactive state. When a
match with the PTPER register occurs, the PTMR reg-
ister is cleared, all active PWM I/O pins are driven to
the inactive state, the PTEN bit is cleared, and an
interrupt is generated.
comparison edge event.
Note:
Single Pulse PWM Operation
The user should not modify the DTCON1
values while the PWM module is operating
(PTEN = 1). Unexpected results may
occur.
 2004 Microchip Technology Inc.
CY
, 2T
CY
, 4T
CY
or 8T
CY
)