PIC16F876-20/SO Microchip Technology, PIC16F876-20/SO Datasheet - Page 103

IC MCU FLASH 8KX14 EE 28SOIC

PIC16F876-20/SO

Manufacturer Part Number
PIC16F876-20/SO
Description
IC MCU FLASH 8KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876-20/SO

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
5
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F876-20/SO
Manufacturer:
MCI
Quantity:
56
Part Number:
PIC16F876-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.3.3
1997 Microchip Technology Inc.
Banking
The data memory is partitioned into four banks. Each bank contains General Purpose Registers
and Special Function Registers. Switching between these banks requires the RP0 and RP1 bits
in the STATUS register to be configured for the desired bank when using direct addressing. The
IRP bit in the STATUS register is used for indirect addressing.
Table 6-1:
Each Bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the
Special Function Registers. Above the Special Function Registers are General Purpose Regis-
ters. All data memory is implemented as static RAM. All Banks may contain special function reg-
isters. Some “high use” special function registers from Bank0 are mirrored in the other banks for
code reduction and quicker access.
Through the evolution of the products, there are a few variations in the layout of the Data Memory.
The data memory organization that will be the standard for all new devices is shown in
Figure
reduce the software overhead for context switching. The registers in bold will be in every device.
The other registers are peripheral dependent. Not every peripheral’s registers are shown,
because some file addresses have a different registers from those shown. As with all the figures,
tables, and specifications presented in this reference guide, verify the details with the device spe-
cific data sheet.
Figure 6-4: Direct Addressing
Accessed
Bank
RP1 RP0
bank select
0
1
2
3
6-5. This Memory map has the last 16-bytes mapped across all memory banks. This is to
Section 6. Memory Organization
Direct and Indirect Addressing of Banks
(RP1:RP0)
Direct
location select
6
Direct Addressing
0 0
0 1
1 0
1 1
Data
Memory
from opcode
Indirect
(IRP)
7Fh
00h
0
1
Bank0
00
0
Bank1
01
Bank2
10
Bank3
11
DS31006A-page 6-9
7Fh
6

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