PIC16F876-20/SO Microchip Technology, PIC16F876-20/SO Datasheet - Page 290

IC MCU FLASH 8KX14 EE 28SOIC

PIC16F876-20/SO

Manufacturer Part Number
PIC16F876-20/SO
Description
IC MCU FLASH 8KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876-20/SO

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
5
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F876-20/SO
Manufacturer:
MCI
Quantity:
56
Part Number:
PIC16F876-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PICmicro MID-RANGE MCU FAMILY
17.3.5
17.3.6
DS31017A-page 17-14
Slave Mode
Slave Select Synchronization
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the SSPIF interrupt flag bit is set.
While in slave mode the external clock is supplied by the external clock source on the SCK pin.
This external clock must meet the minimum high and low times as specified in the electrical spec-
ifications.
While in sleep mode, the slave can transmit/receive data. When a byte is receive the device will
wake-up from sleep.
The SS pin allows a synchronous slave mode. The SPI must be in slave mode with SS pin
control enabled (SSPCON1<3:0> = 04h). The pin must not be driven low for the SS pin to
function as an input. The Data Latch must be high. When the SS pin is low, transmission
and reception are enabled and the SDO pin is driven. When the SS pin goes high, the SDO
pin is no longer driven, even if in the middle of a transmitted byte, and becomes a floating
output. External pull-up/ pull-down resistors may be desirable, depending on the application.
When the SPI module resets, the bit counter is forced to 0. This can be done by either by forcing
the SS pin to a high level or clearing the SSPEN bit.
To emulate two-wire communication, the SDO pin can be connected to the SDI pin. When the
SPI needs to operate as a receiver the SDO pin can be configured as an input. This disables
transmissions from the SDO. The SDI can always be left as an input (SDI function) since it cannot
create a bus conflict.
Note 1: When the SPI is in Slave Mode with SS pin control enabled, (SSPCON<3:0> =
Note 2: If the SPI is used in Slave Mode with CKE is set, then the SS pin control must be
0100) the SPI module will reset if the SS pin is set to V
enabled.
Preliminary
1997 Microchip Technology Inc.
DD
.

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