PIC16F877A-I/L Microchip Technology, PIC16F877A-I/L Datasheet - Page 120

IC MCU FLASH 8KX14 EE 44PLCC

PIC16F877A-I/L

Manufacturer Part Number
PIC16F877A-I/L
Description
IC MCU FLASH 8KX14 EE 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F877A-I/L

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
44-PLCC
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
44PLCC
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC16F877AI/L

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PIC16F87XA
FIGURE 10-5:
When setting up an Asynchronous Reception, follow
these steps:
1.
2.
3.
4.
5.
TABLE 10-6:
DS39582B-page 118
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH (Section 10.1 “USART Baud
Rate Generator (BRG)”).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
Note:
RX (pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
INTCON
PIR1
RCSTA
RCREG USART Receive Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after the third word,
causing the OERR (Overrun Error) bit to be set.
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
PSPIF
PSPIE
CSRC
SPEN
Bit 7
Start
ASYNCHRONOUS RECEPTION
GIE
bit
(1)
(1)
bit 0
ADIE
PEIE
ADIF
Bit 6
RX9
TX9
bit 1
TMR0IE
SREN
TXEN
RCIF
RCIE
Bit 5
bit 7/8
CREN
SYNC
INTE
Bit 4
TXIF
TXIE
Stop
bit
Word 1
RCREG
Start
SSPIF CCP1IF TMR2IF TMR1IF
SSPIE CCP1IE TMR2IE TMR1IE
bit
RBIE
Bit 3
bit 0
6.
7.
8.
9.
10. If using interrupts, ensure that GIE and PEIE
TMR0IF
BRGH
FERR
Bit 2
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE is set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
(bits 7 and 6) of the INTCON register are set.
bit 7/8
OERR
Word 2
RCREG
TRMT
Bit 1
INTF
Stop
bit
RX9D
TX9D
Bit 0
R0IF
Start
 2003 Microchip Technology Inc.
bit
0000 000x
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
POR, BOR
Value on:
bit 7/8
Stop
bit
0000 000u
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets

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