PIC16C72-20I/SP Microchip Technology, PIC16C72-20I/SP Datasheet - Page 101

• Manufacturer Part Number: PIC16C72-20I/SP
• Description: IC MCU OTP 2KX14 A/D PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C72-20I/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, SPI, SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In asynchronous
mode bit BRGH (TXSTA<2>) also controls the baud
rate. In synchronous mode bit BRGH is ignored.
Table 12-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in master mode (internal clock).
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
TABLE 12-1:
X = value in SPBRG (0 to 255)
TABLE 12-2:
Address
98h
18h
99h
Legend: x = unknown, - = unimplemented read as '0'. Shaded cells are not used by the BRG.
1997 Microchip Technology Inc.
SYNC
0
1
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator (BRG)
Applicable Devices
72 73 73A 74 74A 76 77
Name
TXSTA
RCSTA
SPBRG
= 16 MHz
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
Baud Rate Generator Register
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
SREN CREN
TXEN SYNC
Bit 5
Bit 4
OSC
OSC
/(64(X+1))
/(4(X+1))
Bit 3
—
—
EXAMPLE 12-1: CALCULATING BAUD
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register, causes the
BRG timer to be reset (or cleared), this ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
Desired Baud rate = Fosc / (64 (X + 1))
Calculated Baud Rate=16000000 / (64 (25 + 1))
Error
BRGH TRMT TX9D
FERR OERR RX9D
Bit 2
Note:
9600 =
X
=
=
=
=
Bit 1
For the PIC16C73/73A/74/74A, the asyn-
chronous high speed mode (BRGH = 1)
may experience a high rate of receive
errors. It is recommended that BRGH = 0.
If you desire a higher baud rate than
BRGH = 0 can support, refer to the device
errata for additional information, or use the
PIC16C76/77.
(Calculated Baud Rate - Desired Baud Rate)
=
9615
(9615 - 9600) / 9600
0.16%
OSC
16000000 /(64 (X + 1))
/(16(X + 1)) equation can reduce the
25.042 = 25
Baud Rate= F
Bit 0
RATE ERROR
Desired Baud Rate
BRGH = 1 (High Speed)
0000 -010
0000 -00x
0000 0000
Value on:
PIC16C7X
POR,
BOR
NA
OSC
DS30390E-page 101
/(16(X+1))
0000 -010
0000 -00x
0000 0000
other resets
Value on all