PIC16C72-20I/SP Microchip Technology, PIC16C72-20I/SP Datasheet - Page 234

IC MCU OTP 2KX14 A/D PWM 28DIP

PIC16C72-20I/SP

Manufacturer Part Number
PIC16C72-20I/SP
Description
IC MCU OTP 2KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C72-20I/SP

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16C7X
TABLE 20-8:
DS30390E-page 234
Applicable Devices 72 73 73A 74 74A 76 77
Parameter
*
No.
These parameters are characterized but not tested.
70*
71*
72*
73*
74*
75*
76*
77*
78*
79*
80*
81*
82*
83*
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
TssL2doV
TscH2ssH,
TscL2ssH
SPI MODE REQUIREMENTS
Sym
Characteristic
SS to SCK or SCK input
SCK input high time (slave mode)
SCK input low time (slave mode)
Setup time of SDI data input to SCK
edge
Hold time of SDI data input to SCK
edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (master mode)
SCK output fall time (master mode)
SDO data output valid after SCK
edge
SDO data output setup to SCK
edge
SDO data output valid after SS
edge
SS
after SCK edge
1.5T
T
T
CY
CY
Min
T
100
100
T
CY
10
CY
CY
+ 20
+ 20
+ 40
Typ†
10
10
10
10
Max
25
25
50
25
25
50
50
1997 Microchip Technology Inc.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions

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