PIC18F4220-I/PT Microchip Technology, PIC18F4220-I/PT Datasheet - Page 282

IC MCU FLASH 2KX16 A/D 44TQFP

PIC18F4220-I/PT

Manufacturer Part Number
PIC18F4220-I/PT
Description
IC MCU FLASH 2KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4220-I/PT

Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
512 B
Data Rom Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
36
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
13
Height
1 mm
Interface Type
SPI, I2C, USART
Length
10 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4220-I/PT
Manufacturer:
SST
Quantity:
1 150
Part Number:
PIC18F4220-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2220/2320/4220/4320
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39599G-page 280
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
=
=
Inclusive OR Literal with W
[ label ]
0 ≤ k ≤ 255
(W) .OR. k → W
N, Z
The contents of W are OR’ed with
the eight-bit literal ‘k’. The result is
placed in W.
1
1
literal ‘k’
IORLW
Read
0000
Q2
0x9A
0xBF
IORLW k
1001
0x35
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
RESULT =
W
RESULT =
W
Q1
=
=
register ‘f’
Inclusive OR W with f
[ label ]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) .OR. (f) → dest
N, Z
Inclusive OR W with register ‘f’. If
‘d’ is ‘0’, the result is placed in W. If
‘d’ is ‘1’, the result is placed back in
register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
1
1
IORWF
Read
0001
Q2
0x13
0x91
0x13
0x93
© 2007 Microchip Technology Inc.
RESULT, W
IORWF
00da
Process
Data
Q3
ffff
f [,d [,a]]
destination
Write to
Q4
ffff

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