PIC18F4220-I/PT Microchip Technology, PIC18F4220-I/PT Datasheet - Page 41

• Manufacturer Part Number: PIC18F4220-I/PT
• Description: IC MCU FLASH 2KX16 A/D 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4220-I/PT

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 512 B
• Data Rom Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 36
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 13
• Height: 1 mm
• Interface Type: SPI, I2C, USART
• Length: 10 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details

TABLE 3-3:
© 2007 Microchip Technology Inc.
Primary System
Clock
(PRI_IDLE mode)
T1OSC or INTRC
INTOSC
Sleep mode
Note 1:
Power-Managed
2:
3:
4:
5:
Clock in
Mode
(2)
In this instance, refers specifically to the INTRC clock source.
Includes both the INTOSC 8 MHz source and postscaler derived frequencies.
Two-Speed Start-up is covered in greater detail in Section 23.3 “Two-Speed Start-up”.
Execution continues during the INTOSC stabilization period.
Required delay when waking from Sleep and all Idle modes. This delay runs concurrently with any other
required delays (see Section 3.3 “Idle Modes”).
ACTIVITY AND EXIT DELAY ON WAKE-UP FROM SLEEP MODE OR
ANY IDLE MODE (BY CLOCK SOURCES)
(1)
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
Primary System
Clock
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
Power-Managed
Mode Exit Delay
OST + 2 ms
OST + 2 ms
OST + 2 ms
PIC18F2220/2320/4220/4320
5-10 μs
5-10 μs
5-10 μs
5-10 μs
5-10 μs
5-10 μs
None
OST
OST
OST
(5)
(5)
(4)
(5)
(5)
(4)
Clock Ready
(OSCCON)
Status Bit
OSTS
OSTS
OSTS
OSTS
IOFS
IOFS
IOFS
IOFS
—
—
—
—
CPU and peripherals
clocked by primary clock
and executing
instructions.
CPU and peripherals
clocked by selected
power-managed mode
clock and executing
instructions until primary
clock source becomes
ready.
Not clocked or
Two-Speed Start-up (if
enabled) until primary
clock source becomes
ready
Exit by Interrupt
Activity During Wake-up from
(3)
.
Power-Managed Mode
DS39599G-page 39
Not clocked or
Two-Speed
Start-up
(if enabled)
Exit by Reset
(3)
.