PIC18F4585-I/ML Microchip Technology, PIC18F4585-I/ML Datasheet - Page 320

• Manufacturer Part Number: PIC18F4585-I/ML
• Description: IC MCU FLASH 24KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 3.25 KB
• On-chip Adc: 11 bit
• Number Of Programmable I/os: 44
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.88 mm
• Interface Type: I2C, SPI, EUSART
• Length: 8 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 8 mm
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2585/2680/4585/4680
REGISTER 23-59: TXBIE: TRANSMIT BUFFERS INTERRUPT ENABLE REGISTER
REGISTER 23-60: BIE0: BUFFER INTERRUPT ENABLE REGISTER 0
DS39625C-page 318
bit 7-5
bit 4-2
bit 1-0
bit 7-2
bit 1-0
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 7
Unimplemented: Read as ‘0’
TXB2IE:TXB0IE: Transmit Buffer 2-0 Interrupt Enable bit
1 = Transmit buffer interrupt is enabled
0 = Transmit buffer interrupt is disabled
Unimplemented: Read as ‘0’
B5IE:B0IE: Programmable Transmit/Receive Buffer 5-0 Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
RXB1IE:RXB0IE: Dedicated Receive Buffer 1-0 Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
Legend:
R = Readable bit
-n = Value at POR
B5IE
R/W-0
Note 1: This register is available in Mode 1 and 2 only.
Note 1: This register is available in Mode 1 and 2 only.
U-0
—
(2)
2: TXBnIE in PIE3 register must be set to get an interrupt.
2: Either TXBnIE or RXBnIE in PIE3 register must be set to get an interrupt.
B4IE
R/W-0
U-0
—
(2)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
B3IE
R/W-0
U-0
Preliminary
—
(2)
TXB2IE
B2IE
R/W-0
R/W-0
(2)
(2)
TXB1IE
B1IE
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
(2)
(2)
(1)
TXB0IE
B0IE
R/W-0
R/W-0
© 2007 Microchip Technology Inc.
(2)
(2)
(2)
RXB1IE
x = Bit is unknown
x = Bit is unknown
(1)
R/W-0
U-0
—
(2)
(2)
RXB0IE
R/W-0
U-0
—
bit 0
bit 0
(2)