PIC18F4680-I/PT Microchip Technology, PIC18F4680-I/PT Datasheet - Page 479

• Manufacturer Part Number: PIC18F4680-I/PT
• Description: IC MCU FLASH 32KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 25 C
• On-chip Adc: 11-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4680 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timing Diagrams and Specifications ................................ 435
 2004 Microchip Technology Inc.
Parallel Slave Port (PSP) Write ............................... 145
PWM Auto-Shutdown (PRSEN = 0,
PWM Auto-Shutdown (PRSEN = 1,
PWM Direction Change ........................................... 181
PWM Direction Change at Near
PWM Output ............................................................ 169
Repeat Start Condition ............................................. 216
Reset, Watchdog Timer (WDT),
Send Break Character Sequence ............................ 241
Slave Synchronization ............................................. 193
Slow Rise Time (MCLR Tied to V
SPI Mode (Master Mode) ......................................... 192
SPI Mode (Slave Mode with CKE = 0) ..................... 194
SPI Mode (Slave Mode with CKE = 1) ..................... 194
Stop Condition Receive or Transmit Mode .............. 220
Synchronous Reception
Synchronous Transmission ...................................... 242
Synchronous Transmission (Through TXEN) .......... 243
Time-out Sequence on POR w/PLL
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 439
Transition for Entry to Idle Mode ................................ 38
Transition for Entry to SEC_RUN Mode .................... 35
Transition for Entry to Sleep Mode ............................ 37
Transition for Two-speed Start-up
Transition for Wake from Idle to Run Mode ............... 38
Transition for Wake from Sleep (HSPLL) ................... 37
Transition from RC_RUN Mode to
Transition from SEC_RUN Mode to
Transition to RC_RUN Mode ..................................... 36
A/D Conversion Requirements ................................ 452
AC Characteristics
Capture/Compare/PWM Requirements ................... 440
Auto-Restart Disabled) .................................... 184
Auto-Restart Enabled) ..................................... 184
100% Duty Cycle ............................................. 181
Oscillator Start-up Timer (OST) and
Power-up Timer (PWRT) ................................. 438
V
(Master Mode, SREN) ..................................... 244
Enabled (MCLR Tied to V
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
(INTOSC to HSPLL) ........................................ 354
PRI_RUN Mode ................................................. 36
PRI_RUN Mode (HSPLL) .................................. 35
Internal RC Accuracy ....................................... 436
DD
Rise > T
PWRT
DD
) ............................................ 47
, V
DD
DD
DD
), Case 1 ....................... 46
), Case 2 ....................... 46
Rise T
DD
DD
) ............................. 47
,
PWRT
) .............. 46
PIC18F2585/2680/4585/4680
Preliminary
Top-of-Stack Access .......................................................... 62
TRISE Register
TSTFSZ ........................................................................... 401
Two-Speed Start-up ................................................. 343, 354
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 431
W
Watchdog Timer (WDT) ........................................... 343, 352
WCOL ...................................................... 215, 216, 217, 220
WCOL Status Flag ................................... 215, 216, 217, 220
WWW, On-Line Support ...................................................... 5
X
XORLW ........................................................................... 401
XORWF ........................................................................... 402
CLKO and I/O Requirements ................................... 437
EUSART Synchronous Receive
EUSART Synchronous Transmission
Example SPI Mode Requirements
External Clock Requirements .................................. 435
High/Low-Voltage Detect Characteristics ................ 432
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................ 436
Reset, Watchdog Timer,
Timer0 and Timer1 External
PSPMODE Bit ......................................................... 138
Example Cases ......................................................... 66
BRGH Bit ................................................................. 231
Associated Registers ............................................... 353
Control Register ....................................................... 352
During Oscillator Failure .......................................... 355
Programming Considerations .................................. 352
2
C Bus Data Requirements (Slave Mode) .............. 447
Requirements .................................................. 450
Requirements .................................................. 450
Master Mode, CKE = 0 .................................... 442
Master Mode, CKE = 1 .................................... 443
Slave Mode, CKE = 0 ...................................... 444
Slave Mode, CKE = 1 ...................................... 445
Bits Requirements ........................................... 448
(PIC18F4585/4680) ......................................... 441
Oscillator Start-up Timer,
Power-up Timer and
Brown-out Reset Requirements ...................... 438
Clock Requirements ........................................ 439
2
2
C Bus Data Requirements ................ 449
C Bus Start/Stop
DS39625B-page 477