DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet - Page 226

• Manufacturer Part Number: DSPIC30F6012A-30I/PT
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 52
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012A30IP

dsPIC30F6011A/6012A/6013A/6014A
Data Converter Interface (DCI) Module ............................ 123
Data EEPROM Memory ...................................................... 57
DC Characteristics ............................................................ 174
DCI Module
DS70143E-page 226
Alignment (Figure) ...................................................... 35
Effect of Invalid Memory Accesses (Table)................. 34
MCU and DSP (MAC Class) Instructions Example..... 34
Memory Map ............................................................... 31
Memory Map for dsPIC30F6011A/6013A ................... 32
Memory Map for dsPIC30F6012A/6014A ................... 33
Near Data Space ........................................................ 35
Software Stack ............................................................ 35
Spaces ........................................................................ 31
Width ........................................................................... 34
Erasing ........................................................................ 58
Erasing, Block ............................................................. 58
Erasing, Word ............................................................. 58
Protection Against Spurious Write .............................. 60
Reading....................................................................... 57
Write Verify ................................................................. 60
Writing ......................................................................... 59
Writing, Block .............................................................. 60
Writing, Word .............................................................. 59
Brown-out Reset ............................................... 181, 182
I/O Pin Input Specifications ....................................... 180
I/O Pin Output Specifications .................................... 180
Idle Current (I
Low-Voltage Detect................................................... 180
LVDL ......................................................................... 181
Operating Current (I
Power-Down Current (I
Program and EEPROM............................................. 182
Bit Clock Generator................................................... 127
Buffer Alignment with Data Frames .......................... 129
Buffer Control ............................................................ 123
Buffer Data Alignment ............................................... 123
Buffer Length Control ................................................ 129
COFS Pin.................................................................. 123
CSCK Pin.................................................................. 123
CSDI Pin ................................................................... 123
CSDO Mode Bit ........................................................ 130
CSDO Pin ................................................................. 123
Data Justification Control Bit ..................................... 128
Device Frequencies for Common Codec CSCK Frequen-
Digital Loopback Mode ............................................. 130
Enable....................................................................... 125
Frame Sync Generator ............................................. 125
Frame Sync Mode Control Bits ................................. 125
I/O Pins ..................................................................... 123
Interrupts ................................................................... 130
Introduction ............................................................... 123
Master Frame Sync Operation .................................. 125
Operation .................................................................. 125
Operation During CPU Idle Mode ............................. 130
Operation During CPU Sleep Mode .......................... 130
Receive Slot Enable Bits........................................... 128
Receive Status Bits ................................................... 129
Register Map............................................................. 132
Sample Clock Edge Control Bit................................. 128
Slave Frame Sync Operation .................................... 126
Slot Enable Bits Operation with Frame Sync ............ 128
Slot Status Bits.......................................................... 130
Synchronous Data Transfers .................................... 128
Timing Characteristics
cies (Table) ....................................................... 127
IDLE
) .................................................... 177
DD
)............................................. 176
PD
) ........................................ 178
Development Support ....................................................... 169
Device Configuration
Device Configuration Registers ........................................ 158
Device Overview................................................................. 91
Disabling the UART .......................................................... 105
Divide Support .................................................................... 20
DSP Engine ........................................................................ 20
Dual Output Compare Match Mode .................................... 86
E
Electrical Characteristics .................................................. 173
Enabling and Setting Up UART
Enabling the UART ........................................................... 105
Equations
Errata .................................................................................... 9
External Clock Timing Characteristics
External Clock Timing Requirements ............................... 184
External Interrupt Requests ................................................ 49
F
Fast Context Saving ........................................................... 49
Flash Program Memory ...................................................... 51
I
I/O Pin Specifications
Timing Requirements
Transmit Slot Enable Bits ......................................... 128
Transmit Status Bits.................................................. 129
Transmit/Receive Shift Register ............................... 123
Underflow Mode Control Bit...................................... 130
Word Size Selection Bits .......................................... 125
Register Map ............................................................ 160
FBORPOR ................................................................ 158
FBS........................................................................... 158
FGS .......................................................................... 158
FOSC........................................................................ 158
FSS........................................................................... 158
FWDT ....................................................................... 158
Instructions (Table) ..................................................... 20
Multiplier ..................................................................... 22
Continuous Pulse Mode.............................................. 86
Single Pulse Mode...................................................... 86
AC............................................................................. 183
DC ............................................................................ 174
Setting Up Data, Parity and Stop Bit Selections ....... 105
ADC Conversion Clock ............................................. 135
Baud Rate................................................................. 107
Bit Clock Frequency.................................................. 127
COFSG Period.......................................................... 125
Serial Clock Rate ...................................................... 100
Time Quantum for Clock Generation ........................ 117
Type A, B and C Timer ............................................. 191
Type A Timer ............................................................ 191
Type B Timer ............................................................ 192
Type C Timer ............................................................ 192
Control Registers ........................................................ 52
Input.......................................................................... 180
Output ....................................................................... 180
AC-Link Mode................................................... 197
Multichannel, I
AC-Link Mode................................................... 197
Multichannel, I
NVMADR ............................................................ 52
NVMADRU ......................................................... 52
NVMCON............................................................ 52
NVMKEY ............................................................ 52
2
2
S Modes................................... 195
S Modes................................... 196
© 2011 Microchip Technology Inc.