AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 231

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 24-2. Parity Generation for 512/1024/2048/4096 8-bit Words1
6289C–ATARM–28-May-09
(page size -1 )th byte
(page size -3 )th byte
(page size -2 )th byte
Page size th byte
Page size = 512 Px = 2048
Page size = 1024 Px = 4096
Page size = 2048 Px = 8192
Page size = 4096 Px = 16384
2nd byte
4 th byte
3rd byte
1st byte
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
P1
To calculate P8’ to PX’ and P8 to PX, apply the algorithm that follows.
P2
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Page size = 2
P1'
P4
for i =0 to n
begin
end
for (j = 0 to page_size_byte)
begin
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
if(j[i] ==1)
else
end
P1
P[2
P[2
P2'
i+3
i+3
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
P1'
]=bit7(+)bit6(+)bit5(+)bit4(+)bit3(+)
]’=bit7(+)bit6(+)bit5(+)bit4(+)bit3(+)
n
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
bit2(+)bit1(+)bit0(+)P[2
P1
bit2(+)bit1(+)bit0(+)P[2
P2
P1=bit7(+)bit5(+)bit3(+)bit1(+)P1
P2=bit7(+)bit6(+)bit3(+)bit2(+)P2
P4=bit7(+)bit6(+)bit5(+)bit4(+)P4
P1'=bit6(+)bit4(+)bit2(+)bit0(+)P1'
P2'=bit5(+)bit4(+)bit1(+)bit0(+)P2'
P4'=bit7(+)bit6(+)bit5(+)bit4(+)P4'
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
P1'
AT91SAM9R64/RL64 Preliminary
P4'
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
P1
P2'
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
P1'
P8
P8'
P8
P8'
P8
P8'
P8
P8'
i+3
i+3
]
P16'
P16'
P16
P16
]'
P32
P32
P32
PX
PX'
231