ATMEGA128L-8AU Atmel, ATMEGA128L-8AU Datasheet - Page 292

IC AVR MCU 128K 8MHZ 3V 64TQFP

ATMEGA128L-8AU

Manufacturer Part Number
ATMEGA128L-8AU
Description
IC AVR MCU 128K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
2-Wire/JTAG/USART
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
4K Bytes
Input Output
53
Interface
2-Wire/JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Programmable Memory
128K Bytes
Timers
2-8-bit, 2-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Parallel
Programming
Enter Programming
Mode
Considerations for
Efficient Programming
Chip Erase
292
ATmega128
Table 125. No. of Words in a Page and no. of Pages in the EEPROM
The following algorithm puts the device in parallel programming mode:
1. Apply 4.5V - 5.5V between V
2. Set RESET to “0” and toggle XTAL1 at least SIX times.
3. Set the Prog_enable pins listed in
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100ns after +12V
Note, if External Crystal or External RC configuration is selected, it may not be possible to apply
qualified XTAL1 pulses. In such cases, the following algorithm should be followed:
1. Set Prog_enable pins listed in
2. Apply 4.5 - 5.5V between V
3. Wait 100 µs.
4. Re-program the fuses to ensure that External Clock is selected as clock source
5. Exit Programming mode by power the device down or by bringing RESET pin to 0b0.
6. Entering Programming mode with the original algorithm, as described above.
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
The Chip Erase will erase the Flash and EEPROM
not reset until the program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or the EEPROM are
reprogrammed.
Note:
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for Chip Erase.
4. Give XTAL1 a positive pulse. This loads the command.
EEPROM Size
100ns.
has been applied to RESET, will cause the device to fail entering programming mode.
RESET.
(CKSEL3:0 = 0b0000) If Lock bits are programmed, a Chip Erase command must be
executed before changing the fuses.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value $FF, that is the contents of the entire EEPROM (unless the
EESAVE fuse is programmed) and Flash after a Chip Erase.
Address high byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256-byte EEPROM. This consideration also applies to Signature bytes
reading.
4 Kbytes
1. The EEPRPOM memory is preserved during chip erase if the EESAVE fuse is programmed.
Page Size
8 bytes
CC
CC
PCWORD
EEA[2:0]
Table on page 291
and GND, and wait at least 100µs.
and GND simultaneously as 11.5 - 12.5V is applied to
Table 121 on page 291
No. of Pages
(1)
512
memories plus Lock bits. The Lock bits are
to “0000”.
EEA[11:3]
PCPAGE
to “0000” and wait at least
EEAMSB
8
2467V–AVR–02/11

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