STM8S105K6U6 STMicroelectronics, STM8S105K6U6 Datasheet - Page 13
Manufacturer Part Number
MCU 32KB FLASH EEPROM 32-VFQFPN
Specifications of STM8S105K6U6
I²C, IrDA, LIN, SPI, UART/USART
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
Program Memory Size
32KB (32K x 8)
Program Memory Type
1K x 8
2K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Data Bus Width
Data Ram Size
I2C, SPI, UART
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
Maximum Operating Temperature
+ 85 C
3rd Party Development Tools
Development Tools By Supplier
Minimum Operating Temperature
- 40 C
10 bit, 7 Channel
For Use With
497-10040 - EVAL KIT STM8S DISCOVERY497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bonase Electronics (HK) Co., Limited
Single wire interface module for direct access to the debug module and memory programming.
The interface can be activated in all device operation modes. The maximum data transmission
speed is 145 bytes/ms.
The non-intrusive debugging module features a performance close to a full-featured emulator.
Beside memory and peripherals, also CPU operation can be monitored in real-time by means
of shadow registers.
Flash program and data EEPROM memory
Write protection (WP)
Write protection of Flash program memory and data EEPROM is provided to avoid unintentional
overwriting of memory that could result from a user software malfunction.
There are two levels of write protection. The first level is known as MASS (memory access
security system). MASS is always enabled and protects the main Flash program memory,
data EEPROM and option bytes.
To perform in-application programming (IAP), this write protection can be removed by writing
a MASS key sequence in a control register. This allows the application to write to data
EEPROM, modify the contents of main program memory or the device option bytes.
A second level of write protection, can be enabled to further protect a specific area of memory
known as UBC (user boot code). Refer to the figure below.
The size of the UBC is programmable through the UBC option byte, in increments of 1 page
(512 bytes) by programming the UBC option byte in ICP mode.
This divides the program memory into two areas:
R/W to RAM and peripheral registers in real-time
R/W access to all resources by stalling the CPU
Breakpoints on all program-memory instructions (software breakpoints)
Two advanced breakpoints, 23 predefined configurations
Nested interrupts with three software priority levels
32 interrupt vectors with hardware priority
Up to 37 external interrupts on 6 vectors including TLI
Trap and reset interrupts
Up to 32 Kbytes of Flash program single voltage Flash memory
Up to 1 Kbytes true data EEPROM
Read while write: Writing in data memory possible while executing code in program memory
User option byte area
Main program memory: Up to 32 Kbytes minus UBC
User-specific boot code (UBC): Configurable up to 32 Kbytes
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