STM32F101V8T6 STMicroelectronics, STM32F101V8T6 Datasheet - Page 27
Manufacturer Part Number
MCU ARM 64KB FLASH/TIMER 100LQFP
Specifications of STM32F101V8T6
I²C, IrDA, LIN, SPI, UART/USART
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
Program Memory Size
64KB (64K x 8)
Program Memory Type
10K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
-40°C ~ 85°C
Package / Case
ARM Cortex M3
Data Bus Width
Data Ram Size
I2C, SPI, USART
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
12 bit, 16 Channel
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / Rohs Status
1. I = input, O = output, S = supply, HiZ= high impedance.
2. FT= 5 V tolerant.
3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower
4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should
5. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3
6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even
7. The pins number 2 and 3 in the VFQFPN36 package, and 5 and 6 in the LQFP48 and LQFP64 packages are configured as
8. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
number of peripherals that is included. For example, if a device has only one SPI, two USARTs and two timers, they will be
called SPI1, USART1 & USART2 and TIM2 & TIM 3, respectively. Refer to
be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).
mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum load
of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).
after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the
Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the
STMicroelectronics website: www.st.com.
OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins. For
the LQFP100 package, PD0 and PD1 are available by default, so there is no need for remapping. For more details, refer to
the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual.
The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode.
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available
from the STMicroelectronics website: www.st.com.
Medium-density STM32F101xx pin definitions (continued)
Doc ID 13586 Rev 14
Table 2 on page
Pinouts and pin description
TIM2_CH2 / PB3
PB4 / TIM3_CH1