EZ80F91NA050EG Zilog, EZ80F91NA050EG Datasheet - Page 150
EZ80F91NA050EG
Manufacturer Part Number
EZ80F91NA050EG
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050EG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3869
EZ80F91NA050EG
EZ80F91NA050EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PS019215-0910
Timer Input Capture Value A Register—High Byte
The Timer x Input Capture Value A Register—High Byte (see
byte of the capture value for external input A. For Timer 1, the external input is IC0. For
Timer 3, it is IC2.
Table 63. Timer Input Capture Value Register A—High Byte
= 006Ch, TMR3_CAPA_H = 007Dh)
Timer Input Capture Value B Register—Low Byte
The Timer x Input Capture Value B Register—Low Byte (see
byte of the capture value for external input B. For Timer 1, the external input is IC1. For
Timer 3, it is IC3.
Table 64. Timer Input Capture Value Register B—Low Byte
006Dh, TMR3_CAPB_L = 007Eh)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
x
x
_CAPA_H
_CAPB_L
Value
00h–FFh
Value
00h–FFh
R
R
7
0
7
0
Description
These bits represent the High byte of the 2-byte capture
value, {TMR
bit 15 (msb) of the 16-bit data value. Bit 0 is bit 8 of the 16-
bit timer data value.
Description
These bits represent the Low byte of the 2-byte capture
value, {TMR
bit 7 of the 16-bit data value. Bit 0 is bit 0 (lsb) of the
16-bit timer data value.
R
R
6
0
6
0
x
x
_CAPA_H[7:0], TMR
_CAPB_H[7:0], TMR
R
R
5
0
5
0
R
R
4
0
4
0
R
R
3
0
3
0
Table
Table
Programmable Reload Timers
Product Specification
x
x
_CAPA_L[7:0]}. Bit 7 is
_CAPB_L[7:0]}. Bit 7 is
64) stores the Low
R
R
63) stores the High
2
0
2
0
(TMR1_CAPB_L =
(TMR1_CAPA_H
eZ80F91 MCU
R
R
1
0
1
0
R
R
0
0
0
0
141
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