MC908GR60ACFAE Freescale Semiconductor, MC908GR60ACFAE Datasheet - Page 126

• Manufacturer Part Number: MC908GR60ACFAE
• Description: IC MCU 60K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR60ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Low-Power Modes
10.15 Exiting Stop Mode
These events restart the system clocks and load the program counter with the reset vector or with an
interrupt vector:
Upon exit from stop mode, the system clocks begin running after an oscillator stabilization delay. A 12-bit
stop recovery counter inhibits the system clocks for 4096 CGMXCLK cycles after the reset or external
interrupt.
The short stop recovery bit, SSREC, in the CONFIG1 register controls the oscillator stabilization delay
during stop recovery. Setting SSREC reduces stop recovery time from 4096 CGMXCLK cycles to 32
CGMXCLK cycles.
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External reset — A low on the RST pin resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
External interrupt — A high-to-low transition on an external interrupt pin loads the program counter
with the contents of locations:
–
–
Low-voltage inhibit (LVI) reset — A power supply voltage below the V
and loads the program counter with the contents of locations $FFFE and $FFFF.
Break interrupt — In emulation mode, a break interrupt loads the program counter with the contents
of locations $FFFC and $FFFD.
Timebase module (TBM) interrupt — A TBM interrupt loads the program counter with the contents
of locations $FFDC and $FFDD when the timebase counter has rolled over. This allows the TBM
to generate a periodic wakeup from stop mode.
$FFFA and $FFFB; IRQ pin
$FFE0 and $FFE1; keyboard interrupt pins (low-to-high transition when KBIPx bits are set)
Use the full stop recovery time (SSREC = 0) in applications that use an
external crystal unless the OSCENINSTOP bit is set.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
NOTE
TRIPF
voltage resets the MCU
Freescale Semiconductor