MC908GR60ACFAE Freescale Semiconductor, MC908GR60ACFAE Datasheet - Page 211
![IC MCU 60K FLASH 8MHZ 48-LQFP](/photos/12/19/121920/mc908gr60acfae_sml.jpg)
MC908GR60ACFAE
Manufacturer Part Number
MC908GR60ACFAE
Description
IC MCU 60K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR60ACFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR60ACFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908GR60ACFAE
Manufacturer:
FREESCALE
Quantity:
20 000
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Freescale Semiconductor
SPSCR
OVRF
READ
READ
SPDR
SPRF
SPI RECEIVE
COMPLETE
Figure 15-11. Clearing SPRF When OVRF Interrupt Is Not Enabled
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
SPSCR
1
2
3
4
BYTE 1
OVRF
READ
READ
SPDR
SPRF
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
BYTE 2 SETS SPRF BIT.
1
1
2
3
4
5
6
7
BYTE 1
Figure 15-10. Missed Read of Overflow Condition
2
BYTE 2 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
1
2
3
3
BYTE 2
4
BYTE 2
4
5
BYTE 3
BYTE 3
5
5
6
7
8
6
6
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
CPU READS BYTE 2 IN SPDR, CLEARING SPRF BIT,
BUT NOT OVRF BIT.
BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS NOT CLEARED. BYTE 4 IS LOST.
7
7
8
10
11
12
13
14
8
9
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 SPDR,
CLEARING OVRF BIT.
BYTE 4 SETS SPRF BIT.
CPU READS SPSCR.
CPU READS BYTE 4 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 IN SPDR,
CLEARING SPRF BIT.
9
BYTE 4
BYTE 4
10
11
8
12
13
14
Error Conditions
211
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