C8051F040-GQ Silicon Laboratories Inc, C8051F040-GQ Datasheet - Page 100
C8051F040-GQ
Manufacturer Part Number
C8051F040-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets
1.C8051F040-TB.pdf
(328 pages)
2.C8051F040-TB.pdf
(2 pages)
3.C8051F043-GQ.pdf
(328 pages)
Specifications of C8051F040-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x12b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 13-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
64
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
13
Height
1 mm
Length
14 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
14 mm
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1204
Available stocks
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Quantity
Price
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C8051F040-GQ
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Quantity:
702
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C8051F040-GQ
Manufacturer:
Silicon Laboratories Inc
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- Current page: 100 of 328
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C8051F040/1/2/3/4/5/6/7
7.3.
The ADC2 Programmable Window Detector continuously compares the ADC2 output to user-programmed
limits, and notifies the system when an out-of-bound condition is detected. This is especially effective in an
interrupt-driven system, saving code space and CPU bandwidth while delivering faster system response
times. The window detector interrupt flag (AD2WINT in ADC2CN) can also be used in polled mode. The
reference words are loaded into the ADC2 Greater-Than and ADC2 Less-Than registers (ADC2GT and
ADC2LT). Notice that the window detector flag can be asserted when the measured data is inside or out-
side the user-programmed limits, depending on the programming of the ADC2GT and ADC2LT registers.
7.3.1. Window Detector in Single-Ended Mode
Figure 7.5 shows two example window comparisons for Single-ended mode, with ADC2LT = 0x20 and
ADC2GT = 0x10. In Single-ended mode, the codes vary from 0 to VREF x (255/256) and are represented
as 8-bit unsigned integers. In the left example, an AD2WINT interrupt will be generated if the ADC2 con-
version word (ADC2) is within the range defined by ADC2GT and ADC2LT (if 0x10 ADC2 0x20). In the
right example, and AD2WINT interrupt will be generated if ADC2 is outside of the range defined by
ADC2GT and ADC2LT (if ADC2 0x10 or ADC2 0x20).
100
Bits7-0:
Bits7-0:
R/W
R/W
Bit7
Bit7
ADC2 Programmable Window Detector
High byte of ADC2 Greater-Than Data Word.
Low byte of ADC2 Greater-Than Data Word.
R/W
R/W
Bit6
Bit6
SFR Definition 7.6. ADC2GT: ADC2 Greater-Than Data
SFR Definition 7.7. ADC2LT: ADC2 Less-Than Data
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.5
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0xC4
2
0xC6
2
00000000
Reset Value
Reset Value
11111111
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