C8051F040-GQ Silicon Laboratories Inc, C8051F040-GQ Datasheet - Page 84

IC 8051 MCU 64K FLASH 100TQFP

C8051F040-GQ

Manufacturer Part Number
C8051F040-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F040-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x12b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 13-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
64
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
13
Height
1 mm
Length
14 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
14 mm
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1204

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Manufacturer:
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C8051F040/1/2/3/4/5/6/7
6.4.
The ADC0 Programmable Window Detector continuously compares the ADC0 output to user-programmed
limits, and notifies the system when an out-of-bound condition is detected. This is especially effective in an
interrupt-driven system, saving code space and CPU bandwidth while delivering faster system response
times. The window detector interrupt flag (AD0WINT in ADC0CN) can also be used in polled mode. The
high and low bytes of the reference words are loaded into the ADC0 Greater-Than and ADC0 Less-Than
registers (ADC0GTH, ADC0GTL, ADC0LTH, and ADC0LTL). Reference comparisons are shown starting
on page 85. Notice that the window detector flag can be asserted when the measured data is inside or out-
side the user-programmed limits, depending on the programming of the ADC0GTx and ADC0LTx regis-
ters.
84
Bits7-0:
Bits7-0:
Bits7-0:
R/W
R/W
R/W
Bit7
Bit7
Bit7
ADC0 Programmable Window Detector
SFR Definition 6.10. ADC0GTL: ADC0 Greater-Than Data Low Byte
SFR Definition 6.9. ADC0GTH: ADC0 Greater-Than Data High Byte
SFR Definition 6.11. ADC0LTH: ADC0 Less-Than Data High Byte
High byte of ADC0 Greater-Than Data Word.
Low byte of ADC0 Greater-Than Data Word.
High byte of ADC0 Less-Than Data Word.
R/W
R/W
R/W
Bit6
Bit6
Bit6
R/W
R/W
R/W
Bit5
Bit5
Bit5
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.5
R/W
R/W
R/W
Bit3
Bit3
Bit3
R/W
R/W
R/W
Bit2
Bit2
Bit2
R/W
R/W
R/W
Bit1
Bit1
Bit1
SFR Address:
SFR Address:
SFR Address:
SFR Page:
SFR Page:
SFR Page:
R/W
R/W
R/W
Bit0
Bit0
Bit0
0xC5
0
0xC4
0
0xC7
0
00000000
Reset Value
Reset Value
Reset Value
11111111
11111111

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