MCF53012CQT240 Freescale Semiconductor, MCF53012CQT240 Datasheet - Page 45
![MCU 32BIT COLDFIRE EMAC 208LQFP](/photos/37/62/376255/lqfp-112_sml.jpg)
MCF53012CQT240
Manufacturer Part Number
MCF53012CQT240
Description
MCU 32BIT COLDFIRE EMAC 208LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5301xr
Datasheet
1.MCF53010CQT240.pdf
(62 pages)
Specifications of MCF53012CQT240
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, PWM, WDT
Number Of I /o
61
Program Memory Size
16KB (16K x 8)
Program Memory Type
Cache
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Processor Series
MCF5301x
Core
ColdFire V3
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
UART, I2C, SPI, SSI, Ethernet
Maximum Clock Frequency
20 MHz to 400 MHz
Number Of Programmable I/os
61
Number Of Timers
8
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M53015EVB, M53017KIT, M53017MOD
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.17.3
Power down sequence for SIM interface is as follows:
Each of these steps is completed in one CKIL period (usually 32 kHz). Power-down may be started in response to a
card-removal detection or launched by the processor.
sequence, with Fckil = CKIL frequency value.
Freescale Semiconductor
SIM_VEN
SIM_RST
SIM_CLK
SIM_RX
1.
2.
3.
4.
5.
Num
1
2
3
4
SIM_PD port detects the removal of the SIM card
SIM_RST goes low
SIM_CLK goes low
SIM_TX goes low
SIM_VEN goes low
Power Down Sequence
SIM reset to SIM clock stop
SIM reset to SIM TX data low
SIM reset to SIM Voltage Enable Low
SIM Presence Detect to SIM reset Low
T0
1
Table 30. Timing Requirements for Power Down Sequence
Description
Figure 32. Active-Low-Reset Card Reset Sequence
Preliminary—Subject to Change Without Notice
3
MCF5301x Data Sheet, Rev. 5
Figure 33
T1
and
Symbol
S
S
S
S
rst2ven
rst2dat
rst2clk
pd2rst
Table 30
400,000 clock cycles <
400 clock cycles <
2
show the usual timing requirements for this
0.9 ÷ f
1.8 ÷ f
2.7 ÷ f
0.9 ÷ f
Min
CKIL
CKIL
CKIL
CKIL
Preliminary Electrical Characteristics
3
1
2
3
< 200 clock cycles
< 40,000 clock cycles
Max
Response
0.8
1.2
1.8
25
Unit
µs
µs
µs
ns
45