DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 87
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 87 of 1049
- Download datasheet (5Mb)
3.1.3
The H8S/2357 Group has a mode control register (MDCR) that indicates the inputs at the mode pins (MD
system control register (SYSCR) and a system control register 2 (SYSCR2)*
Group. Table 3-3 summarizes these registers.
Table 3-3
Notes: 1. Lower 16 bits of the address.
3.2
3.2.1
Note: * Determined by pins MD
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2357 Group.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins MD
operating mode). Bits MDS2 to MDS0 correspond to MD
written to. The mode pin (MD
canceled by a power-on reset, but are retained after a manual reset.*
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
3.2.2
Note: * R/W in the H8S/2390, H8S/2392, H8S/2394, and H8S/2398.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
2. The SYSCR2 register can only be used in the F-ZTAT version. In the masked ROM and ZTAT versions, this
Register Configuration
Register Descriptions
Mode Control Register (MDCR)
System Control Register (SYSCR)
register cannot be written to and will return an undefined value if read.
Name
Mode control register
System control register
System control register 2*
MCU Registers
:
:
:
:
R/W
—
—
—
7
1
7
0
2
—
—
—
—
2
6
0
6
0
to MD
to MD
0
0
2
INTM1
.
) input levels are latched into these bits when MDCR is read. These latches are
R/W
—
—
5
0
5
0
Abbreviation
MDCR
SYSCR
SYSCR2
INTM0
R/W
—
—
4
0
4
0
2
to MD
NMIEG
R/W
—
—
R/W
R
R/W
R/W
3
0
3
0
0
. MDS2 to MDS0 are read-only bits, they cannot be
MDS2
—*
—*
—
2
R
2
0
Initial Value
Undetermined
H'01
H'00
2
that control the operation of the H8S/2357
MDS1
R/W
—*
—
1
R
1
0
Rev.6.00 Oct.28.2004 page 57 of 1016
MDS0
RAME
R/W
—*
0
R
0
1
Address*
H'FF3B
H'FF39
H'FF42
2
to MD
REJ09B0138-0600H
1
2
to MD
0
(the current
0
), and a
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