MC912DG128ACPVER Freescale Semiconductor, MC912DG128ACPVER Datasheet - Page 217
![IC MCU 16BIT 8K FLASH 112-LQFP](/photos/12/21/122171/mc912dg128acpver_sml.jpg)
MC912DG128ACPVER
Manufacturer Part Number
MC912DG128ACPVER
Description
IC MCU 16BIT 8K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DG128ACPVER
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 8 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC912DG128ACPVERTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
STM
Quantity:
1 244
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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13.5.2 MC68HC912Dx128P Oscillator Circuit Specifications
13.5.2.1 Negative Resistance Margin
MC68HC912DT128A — Rev 4.0
MOTOROLA
Negative Resistance Margin (NRM) is a figure of merit commonly used
to qualify an oscillator circuit with a given resonator. NRM is an indicator
of how much additional resistance in series with the resonator is
tolerable while still maintaining oscillation. This figure is usually expected
to be a multiple of the nominal "maximum" rated ESR of the resonator to
allow for variation and degradation of the resonator.
Currently, many systems are optimized for NRM by adjusting the load
capacitors until NRM is maximized. This method may not achieve the
best overall NRM because the optimization method is empirical and not
analytical. That is, the method only achieves the best NRM for the
particular sample set of microcontrollers, resonators, and board values
tested. The figure below shows the anticipated NRM for a nominal 4MHz
resonator given the expected process variance of the microcontroller
(D60A), board, and crystal (excluding ESR). In this case, the value of
load capacitors providing the optimum NRM for a best-case situation
yield an unacceptable NRM for a worst-case situation (the slope of the
NRM vs. capacitance curve is very steep, indicating severe sensitivity to
small variations). If the NRM optimization happened to be performed on
a best-case sample set, there could be unexpected sensitivity at worst-
case.
Freescale Semiconductor, Inc.
For More Information On This Product,
8
10
Go to: www.freescale.com
13
Negative Resistance Margin vs. Capacitance
15
Oscillator
18
Capacitance
22
27
MC68HC912Dx128P Pierce Oscillator Specification
33
39
47
56
68
1000
100
10
Technical Data
WCS
TYP
TYP
BCS
Oscillator
217
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