DF2338VFC25V Renesas Electronics America, DF2338VFC25V Datasheet - Page 227
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122201/df2338vfc25v_sml.jpg)
DF2338VFC25V
Manufacturer Part Number
DF2338VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2338VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2338VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.2.59 (2)
SHLL (SHift Logical Left)
Operation
Rd (left logical shift)
Assembly-Language Format
SHLL.B #2, Rd
Operand Size
Byte
Description
This instruction shifts the bits in an 8-bit register Rd (destination operand) two bits to the left. Bit
6 shifts into the carry flag. Bits 0 and 1 are cleared to 0.
Available Registers
Rd: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Notes
The SHLL instruction differs from the SHAL instruction in its effect on the overflow flag.
Register direct
Addressing
Mode
SHLL (B)
Mnemonic
SHLL.B
C
Rd
MSB
Operands
b7
#2, Rd
b6
1st byte
1
. . . .
0
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 6.
2nd byte
4
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 211 of 322
—
I
rd
UI H
—
b1
0
Section 2 Instruction Descriptions
—
3rd byte
LSB
b0
0
—
U
N
0
4th byte
REJ09B0139-0400
Z
Shift Logical
V
0
States
No. of
C
1
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