PIC18F14K50-I/P Microchip Technology, PIC18F14K50-I/P Datasheet - Page 116

IC PIC MCU FLASH 8KX16 20-PDIP

PIC18F14K50-I/P

Manufacturer Part Number
PIC18F14K50-I/P
Description
IC PIC MCU FLASH 8KX16 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/P

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/MSSP/SPI/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
20PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F/LF1XK50
13.5
If CCP1 module is configured to use Timer3 and to
generate a Special Event Trigger in Compare mode
(CCP1M<3:0>), this signal will reset Timer3. It will also
start an A/D conversion if the A/D module is enabled
(see Section 17.2.8 “Special Event Trigger” for more
information).
The module must be configured as either a timer or
synchronous counter to take advantage of this feature.
When used this way, the CCPR1H:CCPR1L register
pair effectively becomes a period register for Timer3.
If Timer3 is running in Asynchronous Counter mode,
the Reset operation may not work.
In the event that a write to Timer3 coincides with a
Special Event Trigger from a CCP module, the write will
take precedence.
TABLE 13-1:
DS41350D-page 116
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
TRISC
ANSELH
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3 module.
Name
Resetting Timer3 Using the CCP
Special Event Trigger
Timer3 Register, Low Byte
Timer3 Register, High Byte
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIE
OSCFIP
OSCFIF
TRISC7
RD16
RD16
Bit 7
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
TRISC6
T1RUN
Bit 6
C1IF
C1IE
C1IP
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
TRISC5
C2IE
C2IP
Bit 5
C2IF
TRISC4
INT0IE
Preliminary
EEIF
EEIE
EEIP
Bit 4
TRISC3
ANS11
RABIE
BCLIF
BCLIE
BCLIP
Bit 3
T3SYNC
TMR0IF
TRISC2
ANS10
USBIF
USBIE
USBIP
Bit 2
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR3IF
TMR3IE
TMR3IP
TRISC1
INT0IF
ANS9
Bit 1
 2010 Microchip Technology Inc.
CCP2IE
CCP2IP
CCP2IF
TRISC0
RABIF
ANS8
Bit 0
on page
Values
Reset
287
290
290
290
289
289
288
289
290
290

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