PIC18F1320-I/ML Microchip Technology, PIC18F1320-I/ML Datasheet - Page 18

• Manufacturer Part Number: PIC18F1320-I/ML
• Description: IC MCU FLASH 4KX16 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/ML

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: USART
• On-chip Adc: 7-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18FX220/X320
3.5
The ID locations are programmed much like the code
memory. The single panel that will be written will auto-
matically be enabled, based on the value of the Table
Pointer. The ID registers are mapped in addresses
200000h through 200007h. These locations read out
normally, even after code protection.
TABLE 3-6:
DS39592F-page 18
Step 1: Direct access to code memory.
Step 2: Load write buffer.
Note:
Command
0000
0000
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
4-Bit
ID Location Programming
The user must fill the 8-byte data buffer for
the panel.
8E A6
9C A6
0E 20
6E F8
0E 00
6E F7
0E 00
6E F6
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
00 00
WRITE ID SEQUENCE
Data Payload
BSF
BCF
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and start programming
NOP - hold PGC high for time P9
EECON1, EEPGD
EECON1, CFGS
Table 3-6 demonstrates the code sequence required to
write the ID locations.
The Table Pointer must be manually set to 200000h
(base address of the ID locations). The post-increment
feature of the table read 4-bit command may not be
used to increment the Table Pointer to 200000h. The
post-increment feature may then be used to increment
to 200001h, 200002h, etc.
Core Instruction
 2010 Microchip Technology Inc.