EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 10

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

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EP9315
Enhanced Universal Platform SOC Processor
Real-Time Clock with Software Trim
The software trim feature on the real time clock (RTC)
provides software controlled digital compensation of the
32.768 kHz input clock. This compensation is accurate to
±1.24 sec/month.
PLL and Clocking
The processor and the peripheral clocks operate from a
single 14.7456 MHz crystal.
The real time clock operates from a 32.768 kHz external
oscillator.
Timers
The Watchdog Timer insures proper operation by
requiring periodic attention to prevent a reset-on-time-
out.
Two 16-bit timers operate as free running down-counters
or as periodic timers for fixed interval interrupts and have
a range of 0.03 ms to 4.27 seconds.
One 32-bit timer, plus a 6-bit prescale counter, has a
range of 0.03 μs to 73.3 hours.
One 40-bit debug timer, plus 6-bit prescale counter, has a
range of 1.0 μs to 12.7 days.
Interrupt Controller
The interrupt controller allows up to 64 interrupts to
generate an Interrupt Request (IRQ) or Fast Interrupt
Request (FIQ) signal to the processor core. Thirty-two
hardware priority assignments are provided for assisting
IRQ vectoring, and two levels are provided for FIQ
vectoring. This allows time critical interrupts to be
processed in the shortest time possible. Internal
interrupts may be programmed as active-high or active-
10
RTCXTALI
RTCXTALO
XTALI
XTALO
VDD_PLL
GND_PLL
Note:
Pin Mnemonic
Pin Mnemonic
Table L. Real-Time Clock with Pin Assignments
Table M. PLL and Clocking Pin Assignments
A real time clock must be connected to RTCXTALI or
the EP9315 device will not boot.
Real-Time Clock Oscillator Input
Real-Time Clock Oscillator Output
Main Oscillator Input
Main Oscillator Output
Main Oscillator Power
Main Oscillator Ground
Pin Name - Description
Pin Name - Description
Copyright 2010 Cirrus Logic (All Rights Reserved)
low, level-sensitive inputs. GPIO may be programmed as
active-high level-sensitive, active-low level-sensitive,
rising-edge-triggered, falling-edge-triggered, or combined
rising/falling-edge-triggered.
Dual LED Drivers
Two pins are assigned specifically to drive external
LEDs.
General Purpose Input/Output (GPIO)
The 16 EGPIO pins may each be configured individually
as an output, an input, or an interrupt input. Port F may
be configured as GPIO. Each Port F pin may be
configured individually as an output, input or an interrupt
input.
There are 23 pins that may be used as alternate inputs or
outputs, but do not support interrupts. These pins are:
6 pins may alternatively be used as inputs only:
2 pins may alternatively be used as outputs only:
INT[3:0]
GRLED
REDLED
Pin Mnemonic
Supports 64 interrupts from a variety of sources (such
as UARTs, GPIO, and key matrix)
Routes interrupt sources to either the ARM920T’s
IRQ or FIQ (Fast IRQ) inputs
Four dedicated off-chip interrupt lines INT[3:0]
operate as active-high, level-sensitive interrupts
Any of the 16 GPIO lines maybe configured to
generate interrupts
Software supported priority mask for all FIQs and
IRQs
Pin Mnemonic
• Key Matrix ROW[7:0], COL[7:0]
• Ethernet MDIO
• Both LED Outputs
• Two-wire Clock and Data
• SLA [1:0]
• CTSn, DSRn / DCDn
• 4 Interrupt Lines
• RTSn
• ARSTn
Table N. External Interrupt Pin Assignment
Table O. Dual LED Pin Assignments
Green LED
Red LED
Description
Pin Name -
External Interrupt 3-0
Pin Name - Description
General Purpose I/O
General Purpose I/O
Alternative Usage
DS638F2

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