EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 26

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

EP9315
Enhanced Universal Platform SOC Processor
Static Memory Burst Write Cycle
26
AD setup to WRn assert time
AD hold from WRn deassert time
WRN/DQMn deassert to AD transition time
CSn hold from WRn deassert time
CSn to WRn assert delay time
CSn to DQMn assert delay time
DQMn assert time
DQMn deassert time
WRn assert time
WRn deassert time
WRn/DQMn deassert to DA transition time
WRn/DQMn assert to DA valid time
DQMn
WAIT
WRn
CSn
AD
RD
DA
Note:
t
DQMd
t
These characteristics are valid when the Page Mode Enable (Burst Mode) bit is set. See the User's Guide for details.
WRd
t
ADs
Parameter
t
DAv
t
t
DQpwL
WRpwL
Figure 13. Static Memory Burst Write Cycle Timing Measurement
t
t
t
ADd
WRpwH
DQpwH

Copyright 2010 Cirrus Logic (All Rights Reserved)
t
DAh
Symbol
t
t
t
t
WRpwH
t
DQpwH
WRpwL
DQpwL
t
DQMd
t
t
t
t
t
t
WRd
ADh
ADd
CSh
DAh
ADs
DAv
t
t
HCLK
HCLK
t
Min
HCLK
7
− 3
× 2
t
t
HCLK
HCLK
× (WST1 + 11)
× (WST1 + 1)
Typ
(t
(t
HCLK
HCLK
t
HCLK
Max
× 2) + 14
2
1
8
× 2) + 7
+ 6
t
ADh
t
CSh
DS638F2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns