Z8F0123SB005EG Zilog, Z8F0123SB005EG Datasheet - Page 108
Z8F0123SB005EG
Manufacturer Part Number
Z8F0123SB005EG
Description
IC ENCORE MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0123SB005EG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
269-3757
- Current page: 108 of 247
- Download datasheet (4Mb)
PS024314-0308
Receiving Data using the Interrupt-Driven Method
The UART Receiver interrupt indicates the availability of new data (as well as error
conditions). Follow the steps below to configure the UART receiver for interrupt-driven
operation:
1. Write to the UART Baud Rate High and Low Byte registers to set the acceptable baud
2. Enable the UART pin functions by configuring the associated GPIO port pins for
3. Execute a
4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set
5. Clear the UART Receiver interrupt in the applicable Interrupt Request register.
6. Write to the UART Control 1 Register to enable Multiprocessor (9-bit) mode
7. Write the device address to the Address Compare Register (automatic
8. Write to the UART Control 0 register to:
9. Execute an
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine (ISR) performs the
following:
1. Checks the UART Status 0 register to determine the source of the interrupt - error,
2. Reads the data from the UART Receive Data register if the interrupt was because of
rate.
alternate function operation.
the acceptable priority.
functions, if appropriate.
–
–
–
MULTIPROCESSOR modes only).
–
–
break, or received data.
data available. If operating in MULTIPROCESSOR (9-bit) mode, further actions may
be required depending on the MULTIPROCESSOR mode bits MPMD[1:0].
Set the Multiprocessor Mode Select (MPEN) to Enable MULTIPROCESSOR
mode
Set the Multiprocessor Mode Bits,
matching scheme
Configure the UART to interrupt on received data and errors or errors only
(interrupt on errors only is unlikely to be useful for Z8 Encore! XP devices
without a DMA block)
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if appropriate and if multiprocessor mode is not enabled, and select
either even or odd parity
DI
EI
instruction to disable interrupts.
instruction to enable interrupts.
MPMD[1:0]
Universal Asynchronous Receiver/Transmitter
, to select the acceptable address
Z8 Encore! XP
Product Specification
®
F0823 Series
98
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