Z8F6422AR020SG Zilog, Z8F6422AR020SG Datasheet - Page 121
![IC ENCORE MCU FLASH 64K 64LQFP](/photos/12/15/121511/269-64-lqfp_sml.jpg)
Z8F6422AR020SG
Manufacturer Part Number
Z8F6422AR020SG
Description
IC ENCORE MCU FLASH 64K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F6422AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F642x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4283
Z8F6422AR020SG
Z8F6422AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F6422AR020SG
Manufacturer:
CIRRUS
Quantity:
34
Part Number:
Z8F6422AR020SG
Manufacturer:
ZILOG
Quantity:
20 000
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- Download datasheet (9Mb)
PS019921-0308
DE
1
0
1
0
Idle State
Figure 16. UART Driver Enable Signal Timing (shown with 1 Stop Bit and Parity)
of Line
UART Interrupts
when a byte is written to the UART Transmit Data register. The Driver Enable signal
asserts at least one UART bit period and no greater than two UART bit periods before the
Start bit is transmitted. This timing allows a setup time to enable the transceiver. The
Driver Enable signal deasserts one system clock period after the last Stop bit is transmit-
ted. This one system clock delay allows both time for data to clear the transceiver before
disabling it, as well as the ability to determine if another character follows the current
character. In the event of back to back characters (new data must be written to the Trans-
mit Data Register before the previous character is completely transmitted) the
not deasserted between characters. The
polarity of the Driver Enable signal.
The Driver Enable to Start bit setup time is calculated as follows:
The UART features separate interrupts for the transmitter and the receiver. In addition,
when the UART primary functionality is disabled, the Baud Rate Generator can also func-
tion as a basic timer with interrupt capability.
Transmitter Interrupts
The transmitter generates a single interrupt when the Transmit Data Register Empty bit
(
mission. The
of data out. At this point, the Transmit Data register may be written with the next character
to send. This provides 7 bit periods of latency to load the Transmit Data register before the
Transmit shift register completes shifting the current character. Writing to the UART
Transmit Data register clears the
Start
TDRE
------------------------------------ -
Baud Rate (Hz)
) is set to 1. This indicates that the transmitter is ready to accept new data for trans-
Bit0
lsb
1
TDRE
Bit1
interrupt occurs after the Transmit shift register has shifted the first bit
≤
DE to Start Bit Setup Time (s)
Bit2
Bit3
Data Field
TDRE
Bit4
bit to 0.
DEPOL
Bit5
bit in the UART Control Register 1 sets the
≤
Bit6
------------------------------------ -
Baud Rate (Hz)
Z8 Encore! XP
msb
Bit7
2
Product Specification
Parity
®
Stop Bit
F64XX Series
1
DE
signal is
UART
107
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