Z8F6422AR020SG Zilog, Z8F6422AR020SG Datasheet - Page 182
![IC ENCORE MCU FLASH 64K 64LQFP](/photos/12/15/121511/269-64-lqfp_sml.jpg)
Z8F6422AR020SG
Manufacturer Part Number
Z8F6422AR020SG
Description
IC ENCORE MCU FLASH 64K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F6422AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F642x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4283
Z8F6422AR020SG
Z8F6422AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F6422AR020SG
Manufacturer:
CIRRUS
Quantity:
34
Part Number:
Z8F6422AR020SG
Manufacturer:
ZILOG
Quantity:
20 000
- Current page: 182 of 297
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Table 84. DMA_ADC Control Register (DMAACTL)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
DMA_ADC Control Register
DAEN
7
DMAA_ADDR—DMA_ADC Address
These bits specify the seven most-significant bits of the 12-bit Register File addresses
used for storing the ADC output data. The ADC Analog Input Number defines the five
least-significant bits of the Register File address. Full 12-bit address is
{DMAA_ADDR[7:1], 4-bit ADC Analog Input Number, 0}.
Reserved
This bit is reserved and must be 0.
The DMA_ADC Control register
enable and interrupt enable) for ADC operation.
DAEN—DMA_ADC Enable
0 = DMA_ADC is disabled and the ADC Analog Input Number (ADC_IN) is reset to 0.
1 = DMA_ADC is enabled.
IRQEN—Interrupt Enable
0 = DMA_ADC does not generate any interrupts.
1 = DMA_ADC generates an interrupt after transferring data from the last ADC Analog
Input specified by the ADC_IN field.
Reserved
These bits are reserved and must be 0.
ADC_IN—ADC Analog Input Number
These bits set the number of ADC Analog Inputs to be used in the continuous update
(data conversion followed by DMA data transfer). The conversion always begins with
ADC Analog Input 0 and then progresses sequentially through the other selected ADC
Analog Inputs.
0000 = ADC Analog Input 0 updated.
0001 = ADC Analog Inputs 0-1 updated.
0010 = ADC Analog Inputs 0-2 updated.
0011 = ADC Analog Inputs 0-3 updated.
0100 = ADC Analog Inputs 0-4 updated.
IRQEN
6
5
Reserved
(Table 84
4
FBEH
R/W
0
on page 168) enables and sets options (DMA
3
Z8 Encore! XP
2
Direct Memory Access Controller
ADC_IN
Product Specification
1
®
F64XX Series
0
168
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