Z8F6422AR020SG Zilog, Z8F6422AR020SG Datasheet - Page 220
![IC ENCORE MCU FLASH 64K 64LQFP](/photos/12/15/121511/269-64-lqfp_sml.jpg)
Z8F6422AR020SG
Manufacturer Part Number
Z8F6422AR020SG
Description
IC ENCORE MCU FLASH 64K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F6422AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F642x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4283
Z8F6422AR020SG
Z8F6422AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F6422AR020SG
Manufacturer:
CIRRUS
Quantity:
34
Part Number:
Z8F6422AR020SG
Manufacturer:
ZILOG
Quantity:
20 000
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- Download datasheet (9Mb)
Table 103. OCD Status Register (OCDSTAT)
PS019921-0308
BITS
FIELD
RESET
R/W
OCD Status Register
IDLE
0 = BRK instruction sets DBGMODE to 1.
1 = eZ8 CPU loops on BRK instruction.
Reserved
These bits are reserved and must be 0.
RST—Reset
Setting this bit to 1 resets the Z8 Encore! XP
through a normal Power-On Reset sequence with the exception that the On-Chip Debug-
ger is not reset. This bit is automatically cleared to 0 when the reset finishes.
0 = No effect
1 = Reset the Z8 Encore! XP
The OCD Status register
the debugger and the system.
IDLE—CPU idling
This bit is set if the part is in DEBUG mode (DBGMODE is 1), or if a BRK instruction
occurred since the last time OCDCTL was written. This can be used to determine if the
CPU is running or if it is idling.
0 = The eZ8 CPU is running.
1 = The eZ8 CPU is either stopped or looping on a BRK instruction.
HALT—HALT Mode
0 = The device is not in HALT mode.
1 = The device is in HALT mode.
RPEN—Read Protect Option Bit Enabled
0 = The Read Protect Option Bit is disabled (1).
1 = The Read Protect Option Bit is enabled (0), disabling many OCD commands.
Reserved
These bits are always 0.
7
HALT
6
RPEN
5
(Table
®
F64XX Series device
103) reports status information about the current state of
4
R
0
®
F64XX Series devices. The devices go
3
Z8 Encore! XP
Reserved
2
Product Specification
1
®
On-Chip Debugger
F64XX Series
0
206
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