C8051F902-GU Silicon Laboratories Inc, C8051F902-GU Datasheet - Page 114
![IC MCU 8BIT 8KB FLASH 24QSOP](/photos/12/15/121586/c8051f9xx_24-qsop_sml.jpg)
C8051F902-GU
Manufacturer Part Number
C8051F902-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F902-GU
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1849-5
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
C8051F902-GU
Manufacturer:
SEMIKRON
Quantity:
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Company:
Part Number:
C8051F902-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
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C8051F91x-C8051F90x
11.1. SFR Paging
To accommodate more than 128 SFRs in the 0x80 to 0xFF address space, SFR paging has been
implemented. By default, all SFR accesses target SFR Page 0x0 to allow access to the registers listed in
Table 11.1. During device initialization, some SFRs located on SFR Page 0xF may need to be accessed.
Table 11.2 lists the SFRs accessible from SFR Page 0x0F. Some SFRs are accessible from both pages,
including the SFRPAGE register. SFRs only accessible from Page 0xF are in bold. SFRs only available on
the ‘F912 and ‘F902 devices are in blue.
The following procedure should be used when accessing SFRs on Page 0xF:
114
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
(bit addressable)
PSW
ACC
0(8)
P2
P1
P0
IE
1. Save the current interrupt state (EA_save = EA).
2. Disable Interrupts (EA = 0).
3. Set SFRPAGE = 0xF.
4. Access the SFRs located on SFR Page 0xF.
5. Set SFRPAGE = 0x0.
6. Restore interrupt state (EA = EA_save).
B
Table 11.2. Special Function Register (SFR) Memory Map (Page 0xF)
CRC0DAT
IREF0CF
CLKSEL
1(9)
SP
ADC0PWR
CRC0CN
DPL
2(A)
CRC0IN
DPH
3(B)
Rev. 1.0
DC0MD
P0DRV
4(C)
CRC0FLIP
PMU0MD
ADC0TK
P1DRV
TOFFL
FLWR
5(D)
CRC0AUTO CRC0CNT
P2DRV
TOFFH
EIP1
EIE1
6(E)
SFRPAGE
PCON
EIP2
EIE2
7(F)
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