C8051F902-GU Silicon Laboratories Inc, C8051F902-GU Datasheet - Page 21
![IC MCU 8BIT 8KB FLASH 24QSOP](/photos/12/15/121586/c8051f9xx_24-qsop_sml.jpg)
C8051F902-GU
Manufacturer Part Number
C8051F902-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F902-GU
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1849-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F902-GU
Manufacturer:
SEMIKRON
Quantity:
45
Company:
Part Number:
C8051F902-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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1.2.
Digital and analog resources are available through 16 I/O pins. Port pins are organized as three byte-wide
ports. Port pins P0.0–P1.6 can be defined as digital or analog I/O. Digital I/O pins can be assigned to one
of the internal digital resources or used as general purpose I/O (GPIO). Analog I/O pins are used by the
internal analog resources. P2.7 can be used as GPIO and is shared with the C2 Interface Data signal
(C2D). See Section “27. C2 Interface” on page 312 for more details.
The designer has complete control over which digital and analog functions are assigned to individual Port
pins, limited only by the number of physical I/O pins. This resource assignment flexibility is achieved
through the use of a Priority Crossbar Decoder. See Section “21.3. Priority Crossbar Decoder” on
page 209 for more information on the Crossbar.
All Port I/Os are 5 V tolerant when used as digital inputs or open-drain outputs. For Port I/Os configured as
push-pull outputs, current is sourced from the VDD/DC+ supply. Port I/Os used for analog functions can
operate up to the VDD/DC+ supply voltage. See Section “21.1. Port I/O Modes of Operation” on page 206
for more information on Port I/O operating modes and the electrical specifications chapter for detailed
electrical specifications.
Highest
Priority
Lowest
Priority
Port Input/Output
SYSCLK
Outputs
SMBus
T0, T1
UART
P0
P1
P2
SPI0
SPI1
CP0
CP1
PCA
(P0.0-P0.7)
(P1.0-P1.6)
(P2.7)
Figure 1.5. Port I/O Functional Block Diagram
2
4
2
4
7
2
8
7
1
Rev. 1.0
XBR2, PnSKIP
XBR0, XBR1,
Crossbar
Decoder
Registers
Priority
Digital
(ADC0, CP0, and CP1 inputs,
C8051F91x-C8051F90x
To Analog Peripherals
VREF, IREF0, AGND)
8
7
1
P0MASK, P0MAT
P1MASK, P1MAT
Port Match
Cells
Cells
Cell
I/O
I/O
I/O
P0
P1
P2
PnMDIN Registers
External Interrupts
EX0 and EX1
PnMDOUT,
P0.0
P0.7
P1.0
P1.6
P2.7
21
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