HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 26
HD64F3672FXV
Manufacturer Part Number
HD64F3672FXV
Description
IC H8/3672 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets
1.DF36912GFHV.pdf
(277 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.HD64F3672FXV.pdf
(334 pages)
Specifications of HD64F3672FXV
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
HD64F3672FXV
Manufacturer:
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Quantity:
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Company:
Part Number:
HD64F3672FXV
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Section 1 CPU
1.4.3
The control registers are the 24-bit program counter (PC) and the 8-bit condition-code register
(CCR).
(1) Program Counter (PC)
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 16 bits (one word) or a multiple of 16 bits, so the least significant PC bit
is ignored. When an instruction is fetched, the least significant PC bit is regarded as 0.
(2) Condition Code Register (CCR)
This 8-bit register contains internal CPU status information, including the interrupt mask bit (I)
and half-carry (H), negative (N), zero (Z), overflow (V), and carry (C) flags.
Bit 7—Interrupt Mask Bit (I): Masks interrupts other than NMI when set to 1. (NMI is accepted
regardless of the I bit setting.) The I bit is set to 1 by hardware at the start of an exception-
handling sequence.
Bit 6—User Bit (U): Can be written and read by software using the LDC, STC, ANDC, ORC, and
XORC instructions. This bit can also be used as an interrupt mask bit. For details see the relevant
microcontroller hardware manual.
Rev. 3.00 Dec 13, 2004 page 10 of 258
REJ09B0213-0300
Control Registers
SP (ER7)
Figure 1.9 Stack
Free area
Stack area
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