HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 39

• Manufacturer Part Number: HD64F3672FXV
• Description: IC H8/3672 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FXV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 48-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Type
Bit-manipulation
instructions
Instruction
BOR
BIOR
BXOR
BIXOR
BLD
BILD
BST
BIST
Size *
B
B
B
B
B
B
B
B
Function
C
ORs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ORs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
Exclusive-ORs the carry flag with a specified bit in a
general register or memory operand and stores the
result in the carry flag.
C
Exclusive-ORs the carry flag with the inverse of a
specified bit in a general register or memory operand
and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>)
Transfers a specified bit in a general register or
memory operand to the carry flag.
¬ (<bit-No.> of <EAd>)
Transfers the inverse of a specified bit in a general
register or memory operand to the carry flag.
The bit number is specified by 3-bit immediate data.
C
Transfers the carry flag value to a specified bit in a
general register or memory operand.
¬ C
Transfers the inverse of the carry flag value to a
specified bit in a general register or memory operand.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>)
[¬ (<bit-No.> of <EAd>)]
[¬ (<bit-No.> of <EAd>)]
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Rev. 3.00 Dec 13, 2004 page 23 of 258
C
C
C
C
C
C
REJ09B0213-0300
Section 1 CPU