HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 173
HD64F7047F50V
Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Specifications of HD64F7047F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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8.5
8.5.1
DTC register access by the DTC is prohibited.
8.5.2
DTC operation can be disabled or enabled using the module standby control register. The initial
setting is for DTC operation to be halted. Register access is enabled by clearing module standby
mode.
When the MSTP24 and MSTP25 bits in MSTCR1 are set to 1, the DTC clock is halted and the
DTC enters module standby mode. Do not write 1 on MSTP24 bit or MSTP25 bit during
activation of the DTC.
For details, refer to section 24, Power-Down Modes.
8.5.3
The DTMR, DTSAR, DTDAR, DTCRA, DTCRB and DTIAR registers are all located in on-chip
RAM. When the DTC is used, the RAME bit in SYSCR must not be cleared to 0.
Cautions on Use
Prohibition against DTC Register Access by DTC
Module Standby Mode Setting
On-Chip RAM
Rev. 2.00, 09/04, page 131 of 720
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