HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 476
HD64F7047F50V
Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Specifications of HD64F7047F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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15.3.10 Transmit Acknowledge Registers (TXACK1, TXACK0)
TXACK1 and TXACK0 are 16-bit registers containing status flags that indicate normal
transmission of mailbox transmit messages.
• TXACK1
Rev. 2.00, 09/04, page 434 of 720
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
TXACK31
TXACK30
TXACK29
TXACK28
TXACK27
TXACK26
TXACK25
TXACK24
TXACK23
TXACK22
TXACK21
TXACK20
TXACK19
TXACK18
TXACK17
TXACK16
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Status flags that indicate error-free transmission of
the transmit message in the corresponding
mailboxes from 16 to 31. When the message in
mailbox n (n = 16 to 31) has been transmitted error-
free, TXACKn is set to 1.
[Setting condition]
•
[Clearing condition]
•
Notes: 1. Writing operation by the CPU is valid only
Completion of message transmission for
corresponding mailbox
Writing 1
2. Restrictions apply to the use of the
for clearing condition (writing 1) of set
status.
mailbox 31 for transmission. Carefully
read section 15.8, Usage Notes.
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