HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 18

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Section 1 Features
Item
Processing states
Power-down states
Note:
1.2
The SH-DSP is a 32-bit microcontroller based on the Renesas SuperH RISC engine (abbreviated
below as “SuperH”) and incorporating the signal processing performance of a general-use digital
signal processor (DSP). The SuperH already supported some DSP type instructions, such as
multiply and accumulate. In the SH-DSP, the DSP functions have been enhanced, and full DSP
data bus have been implemented. The SH-DSP is backward compatible at the object code level
with the SH-1 and SH-2 CPUs.
The SuperH only has 16-bit instructions. The SH-DSP basically has the same 16-bit instructions,
but it also has additional 32-bit DSP instructions that it uses for parallel processing of DSP type
instructions. The SuperH uses a standard Neumann architecture, but the SH-DSP has the DSP data
bus of the expanded Harvard architecture.
Table 1.2 lists the added features of the SH-DSP.
Rev. 5.00 Jun 30, 2004 page 2 of 512
REJ09B0171-0500O
* The normal minimum number of execution cycles (The number in parentheses in the
SH-DSP Features
number in contention with preceding/following instructions).
Feature
Reset state
Exception processing state
Program execution state
Power-down state
Bus release state
Sleep mode
Standby mode

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