HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 436

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 Pipeline Operation
Relationship between MAC and STS Instructions: The MAC.W instruction has two MA stages
and two mm (multiplier access) stages. When an STS instruction that stores a MACL or MACH
register in the Rn register comes after a MAC.W instruction, the MA stage of the STS instruction
is executed after the mm stage of the MAC.W instruction ends. Likewise, when an STS instruction
that stores a MACL or MACH register in memory comes after a MAC.W instruction, the MA
stage of the STS instruction is executed after the mm stage of the MAC.W instruction ends.
Instruction 1 (MAC.W @Ra+,@Rb+)
7.2.3
Instructions that access multiplier type instructions (Multiply/Accumulate instructions and
multiplication instructions) or the multiply and accumulate calculation registers (MACH and
MACL) contend with multiplier accesses.
In multiplier type instructions, the multiplier operates for either four cycles (for double-length 64
bits instructions) or two cycles (single-length 32 bit instructions) after the MA ends, regardless of
the slot. When the MA (or the second MA, if there are two) of a multiplier type instruction
(Multiply/Accumulate instructions and multiplication instructions) contends with the multiplier
Rev. 5.00 Jun 30, 2004 page 420 of 512
REJ09B0171-0500O
STS.L MAC.L memory
Instruction 1 (MOVS.L @R4,Ds)
Instruction 2 (MOVS.L Ds,@R5)
Figure 7.17 Example of Multiplier Access Contention—MAC.L and STS.L Instructions
Figure 7.15 Relationship between Load and Store Instructions in the DSP Unit
Instruction 2 (STS MACL,Rc)
Next instruction
Multiplier Access Contention
Figure 7.16 Relationship between MAC.W and STS Instructions
MAC.L
Slot
Instruction 3
Instruction 4
Instruction 3
IF
ID
IF
IF
EX
—
if
ID
IF
MA
ID
IF
ID
IF
EX
ID
IF
MA
EX
ID
EX
—
MA
EX
ID
IF
mm
—
MA
M
ID
if
W/D
MA
EX
ID
mm
—
MA mm mm
EX
ID
W/D
MA W/D
EX
mm mm
—
—
—
MA W/D
—
—
—
A
MA W/D
MA
EX
EX
MA W/D
: Slot
: Slot