ATTINY48-MMH Atmel, ATTINY48-MMH Datasheet - Page 48
![MCU AVR 4KB FLASH 12MHZ 28-VQFN](/photos/12/32/123209/28m1-vqfn_sml.jpg)
ATTINY48-MMH
Manufacturer Part Number
ATTINY48-MMH
Description
MCU AVR 4KB FLASH 12MHZ 28-VQFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MMH
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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48
ATtiny48/88
situation, the application software should always clear the Watchdog System Reset Flag
(WDRF) and the WDE control bit in the initialization routine, even if the Watchdog is not in use.
The following code example shows one assembly and one C function for changing the time-out
value of the Watchdog Timer.
Note:
Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change
in the WDP bits can result in a time-out when switching to a shorter time-out period.
Assembly Code Example
C Code Example
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCSR
ori
sts WDTCSR, r16
; --
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCSR, r16
; --
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
__enable_interrupt();
1.
See ”About Code Examples” on page 7.
r16, (1<<WDCE) | (1<<WDE)
Got four cycles to set the new values from here -
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
Finished setting new values, used 2 cycles -
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
(1)
(1)
sequence */
8008G–AVR–04/11
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