ATTINY48-MMH Atmel, ATTINY48-MMH Datasheet - Page 53
![MCU AVR 4KB FLASH 12MHZ 28-VQFN](/photos/12/32/123209/28m1-vqfn_sml.jpg)
ATTINY48-MMH
Manufacturer Part Number
ATTINY48-MMH
Description
MCU AVR 4KB FLASH 12MHZ 28-VQFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MMH
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.2
8008G–AVR–04/11
External Interrupts
A typical and general setup for interrupt vector addresses in ATtiny48/88 is shown in the pro-
gram example below.
Note:
The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT[27:0] pins.
Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1 or PCINT[27:0] pins
are configured as outputs. This feature provides a way of generating a software interrupt, as
follows.
The PCMSK3, PCMSK2, PCMSK1 and PCMSK0 registers control which pins contribute to the
pin change interrupts. Pin change interrupts on PCINT[27:0] are detected asynchronously. This
Assembly Code Example
• Pin Change Interrupt PCI3 triggers if a pin in PCINT[27:24] is toggled while enabled
• Pin Change Interrupt PCI2 triggers if a pin in PCINT[23:16] is toggled while enabled
• Pin Change Interrupt PCI1 triggers if a pin in PCINT[15:8] is toggled while enabled
• Pin Change Interrupt PCI0 triggers if a pin in PCINT[7:0] is toggled while enabled
.org 0x0000
RESET:
rjmp RESET
rjmp INT0_ISR
rjmp INT1_ISR
rjmp PCINT0_ISR
rjmp PCINT1_ISR
rjmp PCINT2_ISR
rjmp PCINT3_ISR
rjmp WDT_ISR
rjmp TIM1_CAPT_ISR
rjmp TIM1_COMPA_ISR
rjmp TIM1_COMPB_ISR
rjmp TIM1_OVF_ISR
rjmp TIM0_COMPA_ISR
rjmp TIM0_COMPB_ISR
rjmp TIM0_OVF_ISR
rjmp SPI_STC_ISR
rjmp ADC_ISR
rjmp EE_RDY_ISR
rjmp ANA_COMP_ISR
rjmp TWI_ISR
<instr>
...
See
“About Code Examples” on page
7.
;Set address of next statement
; Address 0x0000
; Address 0x0001
; Address 0x0002
; Address 0x0003
; Address 0x0004
; Address 0x0005
; Address 0x0006
; Address 0x0007
; Address 0x0008
; Address 0x0009
; Address 0x000A
; Address 0x000B
; Address 0x000C
; Address 0x000D
; Address 0x000E
; Address 0x000F
; Address 0x0010
; Address 0x0011
; Address 0x0012
; Address 0x0013
; Main program start
; Address 0x0038
ATtiny48/88
53
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