PIC16F1937-E/ML Microchip Technology, PIC16F1937-E/ML Datasheet - Page 17
![IC PIC MCU FLASH 512KX14 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F1937-E/ML
Manufacturer Part Number
PIC16F1937-E/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
9.PIC16LF1934-IML.pdf
(418 pages)
Specifications of PIC16F1937-E/ML
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
APPENDIX B:
The following code is a 24-bit IIR by Tony Kubek
extracted from
techref/microchip/dsp/iir-24b-256s-tk.htm). It is a good
example of a non-trivial algorithm that can be
accelerated
instructions and FSR features of the enhanced PIC12/
16. The original code is presented in Appendix C: “24-
Bit 256 Step IIR Filter (Original Code)”.
This is quite a lot of code to look over. There are a few
notable code blocks that can be noticed right away.
First the ADD_FSR_FILTER macros at the beginning
need to be adjusted. The original code is using the FSR
so it should be updated to use FSR0L. After further
study it can be seen that this code is simply a 24-bit add
with the source address in the FSR. That opens the
possibility of additional optimizations. The MOVIW
instruction can be used to eliminate redundant FSR
reloads. The ADDWFC instruction can be used to
eliminate the Carry propogation.
© 2009 Microchip Technology Inc.
ADD_FSR_FILTER MACRO
; 14-17 instructions
; add value pointed to by FSR to filter
ADDWF NewFilter+3,F
DECF
MOVF
SKPNC
INCFSZ INDF,W
ADDWF NewFilter+2,F
DECF
MOVF
SKPNC
INCFSZ INDF,W
ADDWF NewFilter+1,F
DECF
MOVF
SKPNC
INCFSZ INDF,W
ADDWF NewFilter,F
ENDM
MOVF
FSR,F
INDF,W
FSR,F
INDF,W
FSR,F
INDF,W
INDF,W
by
www.piclist.org (http://www.piclist.org/
taking
IIR FILTER CONVERSION EXAMPLE
advantage
; get msb
; get lowest byte
; add to filter sum
;lowest byte
; get next byte
;
; increase source
; and add to dest.
; get next byte
if overflow
of
the
new
Notice an immediate drop in instruction count from 14-
17 instructions to 8 instructions. That is a 50% size
advantage and a 2x speed-up. The multiply and divide
macros are the next interesting block of code in this
example.
ADD_FSR0_FILTER MACRO
ADDWF
lowest byte
; 8 instructions
; add value pointed to by FSR to filter
moviw
MOVIW
ADDWFC
MOVIW
ADDWFC
MOVIW
ADDWFC
ENDM
NewFilter+3,F
0[INDF0]
-1[INDF0]
NewFilter+2,F
-2[INDF0]
NewFilter+1,F
-3[INDF0]
NewFilter,F
; get next byte
; get next byte
; get msb
; add to filter sum
DS41375A-page 17