PIC16F1937-E/ML Microchip Technology, PIC16F1937-E/ML Datasheet - Page 6
![IC PIC MCU FLASH 512KX14 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F1937-E/ML
Manufacturer Part Number
PIC16F1937-E/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
9.PIC16LF1934-IML.pdf
(418 pages)
Specifications of PIC16F1937-E/ML
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
OVERFLOW/UNDERFLOW
The new stack has 16 entries but a 5-bit Stack Pointer.
This Stack Pointer is visible as the STKPTR register in
Bank 31. When the MSb of STKPTR is set after a call
or interrupt, the stack is considered in overflow. If the
optional Reset is enabled, the Program Counter will go
immediately to ‘0’ and the reset condition flag in PCON
will indicate a Stack Reset. If the STKPTR reads 31 (all
bits set) then the stack is considered empty. A return
(RETURN, RETLW, RETFIE) when the stack is empty is
an underflow. If the optional Reset is enabled, the Pro-
gram Counter will go immediately to 0x0000 and the
Reset condition flag in PCON will indicate a Stack
Reset. If the optional Reset is not enabled, the stack
will continue to operate but underflow and overflows
will simply wrap around the 16 entry stack. The Stack
Overflow and Underflow bits can be checked to deter-
mine if a stack is out of bounds.
DEBUGGING ACCESS
The legacy PIC12/16 shared the 8 levels of stack
with the in-circuit debugging firmware. This could be
very restrictive. The enhanced PIC12/16 has an
additional stack reserved for the debugging firm-
ware. This eliminates the possibility of running out of
stack when using Debug mode. When debugging,
the Stack Reset option becomes a break point to
help determine the cause of the stack problem. The
stack access mechanism is also used by the debug-
ger to provide the engineer visibility to the call chain
that led the software to its present state.
USER ACCESS
The user has full access to the 16 levels of user stack.
The debug stack is unavailable. Access to the stack is
through three registers; Stack Pointer (STKPTR), Top-
of-Stack High (TOSH) and Top-of-Stack Low (TOSL).
These registers are located in Bank 31.
MODIFYING THE STACK
Modifying the stack requires that the STKPTR be
adjusted to point to the entry that needs updating, and
TOSH/TOSL be changed to reflect the modification.
The STKPTR register always points at the last entry
placed on the stack. When a call or interrupt is
executed, the STKPTR register is incremented and the
PC is stored at the new TOSH/TOSL location. Make
sure that interrupts are disabled before modifying the
stack.
Relative Branching
Relative branching is branching to a target address that
is based upon the current address. With the legacy
PIC12/16, we often wrote code such as the following:
DS41375A-page 6
When we write the $-1 we are requesting a relative
branch, except the assembler is converting that into an
absolute branch. The payload size of CALL and GOTO
created the 2k page size so CALL and GOTO contribute
to the paging problem.
The enhanced PIC12/16 adds a BRA and BRW relative
branch. The BRA allows you to branch +256 or -255
instructions from the current program counter. The pre-
vious code example would look like this.
Because Label is an absolute address, the assembler
will convert the absolute address to a relative address
by subtracting the current Program Counter from the
destination address. If the $-1 syntax is used, it will
work in the same way. If the constant -1 is supplied to
BRA it will not work because -1 specifies an address at
the end of the program memory and that will most likely
be out of range.
FASTER TABLE READS
The BRW instruction is also a relative branch but the
reach is from 0 to 255. The relative address for BRW is
contained in the W register. This allows the traditional
table read method to execute much faster without
regard for table location.
EXAMPLE 1:
In the example above, the letter ‘t’ is returned to the
calling function.
Table
Label
Label
GOTO
DECFSZ
DECFSZ
BRA
MOVLW
BRW
RETLW
RETLW
RETLW
RETLW
RETLW
RETLW
RETLW
RETLW
$-1
delay
delay
Label
© 2009 Microchip Technology Inc.
3
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