AT90USB82-16MUR Atmel, AT90USB82-16MUR Datasheet - Page 169

• Manufacturer Part Number: AT90USB82-16MUR
• Description: MCU AVR USB 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB82-16MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

17.10.5
17.10.6
17.11 Examples of Baud Rate Setting
7707F–AVR–11/10
USART Control and Status Register n D – UCSRnD
USART Baud Rate Registers – UBRRLn and UBRRHn
• Bits 1 – CTSEN : USART CTS Enable
Set this bit to one by firmware to enable the transmission flow control (CTS). Transmission is
allowed if CTS = 0.
Set this bit to zero by firmware to disable the transmission flow control (CTS). Transmission is
always allowed.
• Bits 0 – RTSEN : USART RTS Enable
Set this bit to one by firmware to enable the receive flow control (RTS).
Set this bit to zero by firmware to disable the receive flow control (RTS).
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
• Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four
most significant bits, and the UBRRL contains the eight least significant bits of the USART baud
rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is
changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRR settings in
UBRR values which yield an actual baud rate differing less than 0.5% from the target baud rate,
are bold in the table. Higher error ratings are acceptable, but the Receiver will have less noise
resistance when the error ratings are high, especially for large serial frames (see
Operational Range” on page
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
7
-
0
R/W
15
–
UBRR[7:0]
7
R
R/W
0
0
6
-
R/W
0
14
–
6
R
R/W
0
0
Error[%]
161). The error values are calculated using the following equation:
13
–
5
R
R/W
0
0
5
-
R/W
0
=
⎛
⎝
BaudRate
------------------------------------------------------- - 1
12
–
4
R
R/W
0
0
4
-
R/W
0
BaudRate
Closest Match
11
UBRR[11:8]
3
R/W
R/W
0
0
3
-
R/W
0
–
2
-
R/W
0
10
2
R/W
R/W
0
0
⎞
⎠
•
100%
AT90USB82/162
1
CTSEN
R/W
0
9
1
R/W
R/W
0
0
Table 17-9
0
RTSEN
R/W
0
8
0
R/W
R/W
0
0
to
“Asynchronous
Table
UBRRHn
UBRRLn
UCSRnD
17-12.
169