AT90USB82-16MUR Atmel, AT90USB82-16MUR Datasheet - Page 56

• Manufacturer Part Number: AT90USB82-16MUR
• Description: MCU AVR USB 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB82-16MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

9.9.1
56
AT90USB82/162
Watchdog Timer Control Register - WDTCSR
The following code example shows one assembly and one C function for changing the time-out
value of the Watchdog Timer.
Note:
Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change
in the WDP bits can result in a time-out when switching to a shorter time-out period.
• Bit 7 - WDIF: Watchdog Interrupt Flag
This bit is set when a time-out occurs twice in the Watchdog Timer and if the Watchdog Timer is
configured for interrupt. WDIF is automatically cleared by hardware when executing the corre-
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
in
ori
out
; --
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
out
; --
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
__enable_interrupt();
1. The example code assumes that the part specific header file is included.
7
WDIF
R/W
0
r16, WDTCSR
r16, (1<<WDCE) | (1<<WDE)
WDTCSR, r16
Got four cycles to set the new values from here -
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
WDTCSR, r16
Finished setting new values, used 2 cycles -
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
(1)
6
WDIE
R/W
0
(1)
equence */
5
WDP3
R/W
0
4
WDCE
R/W
0
3
WDE
R/W
X
2
WDP2
R/W
0
1
WDP1
R/W
0
0
WDP0
R/W
0
7707F–AVR–11/10
WDTCSR