ATMEGA88P-20MUR Atmel, ATMEGA88P-20MUR Datasheet - Page 17

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ATMEGA88P-20MUR

Manufacturer Part Number
ATMEGA88P-20MUR
Description
MCU AVR 8KB FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA88P-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7. AVR Memories
7.1
7.2
8025L–AVR–7/10
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega48P/88P/168P. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega48P/88P/168P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega48P/88P/168P contains 4/8/16 bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2/4/8 x 16. For software security, the Flash Program memory space is divided into two
sections, Boot Loader Section and Application Program Section in ATmega88P and
ATmega168P. ATmega48P does not have separate Boot Loader and Application Program sec-
tions, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section
273
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48P/88P/168P Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2/4/8
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
on page 267
and ATmega168P” on page
description on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
and
page
14.
and
289for more details.
”Boot Loader Support – Read-While-Write Self-Programming, ATmega88P
”SPMCSR – Store Program Memory Control and Status Register” on page
275.
”Memory Programming” on page 291
”Self-Programming the Flash, ATmega48P”
ATmega48P/88P/168P
”Instruction Execution Tim-
contains a detailed
17

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