ATMEGA16A-AUR Atmel, ATMEGA16A-AUR Datasheet - Page 117

• Manufacturer Part Number: ATMEGA16A-AUR
• Description: MCU AVR 16KB FLASH 16MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
17.1
17.2
17.2.1
8154B–AVR–07/09
Features
Overview
Registers
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Timer/Counter2 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed
in the
Figure 17-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers. Interrupt
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and
TIMSK are not shown in the figure since these registers are shared by other timer units.
Single Compare unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)
Allows clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
“Register Description” on page
Status flags
Timer/Counter
TCNTn
OCRn
“Pinout ATmega16A” on page
=
ASSRn
direction
count
clear
BOTTOM
Synchronized Status flags
= 0
130.
Control Logic
=
TCCRn
TOP
asynchronous mode
0xFF
select (ASn)
2. CPU accessible I/O Registers, including I/O
clk
Tn
Synchronization Unit
OCn
(Int.Req.)
Generation
Prescaler
Waveform
Figure
17-1. For the actual placement
ATmega16A
Oscillator
T/C
clk
TOVn
(Int.Req.)
clk
clk
OCn
ASY
I/O
I/O
TOSC1
TOSC2
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