PIC16LC433T-I/SO Microchip Technology, PIC16LC433T-I/SO Datasheet - Page 51

• Manufacturer Part Number: PIC16LC433T-I/SO
• Description: IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC433T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: POR, WDT
• Number Of I /o: 6
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.0
What sets a microcontroller apart from other proces-
sors are special circuits to deal with the needs of real-
time applications. The PIC16C433 device has a host of
such features intended to maximize system reliability,
minimize cost through elimination of external compo-
nents, provide power saving operating modes and offer
code protection. These are:
• Oscillator Selection
• RESET
• Interrupts
• Watchdog Timer (WDT)
• SLEEP
• Code Protection
• ID Locations
• In-Circuit Serial Programming
The PIC16C433 has a Watchdog Timer, which can be
shut-off only through configuration bits. It runs off its
own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is
REGISTER 9-1: CONFIGURATION WORD
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
2001 Microchip Technology Inc.
bit13
bit 13-8, CP<1:0>: Code Protection bit pairs
bit 7:
bit 4:
bit 3:
bit 2-0:
Note 1:
CP1
6-5:
SPECIAL FEATURES OF THE
CPU
CP0
11 = Code protection off
10 = Locations 400h through 7FEh code protected
01 = Locations 200h through 7FEh code protected
00 = All memory is code protected
MCLRE: Master Clear Reset Enable bit
1 = Master Clear enabled
0 = Master Clear disabled
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC<2:0>: Oscillator Selection bits
111 = EXTRC, clockout on OSC2
110 = EXTRC, OSC2 is I/O
101 = INTRC, clockout on OSC2
100 = INTRC, OSC2 is I/O
011 = Invalid selection
010 = HS oscillator
001 = XT oscillator
000 = LP oscillator
All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed.
CP1
CP0
CP1
CP0 MCLRE
(1)
Advance Information
CP1
CP0 PWRTE WDTE FOSC2 FOSC1 FOSC0
the Oscillator Start-up Timer (OST), intended to keep
the chip in RESET until the crystal oscillator is stable.
The other is the Power-up Timer (PWRT), which pro-
vides a fixed delay of 72 ms (nominal) on power-up
only, designed to keep the part in RESET while the
power supply stabilizes. With these two timers on-chip,
most applications need no external RESET circuitry.
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external RESET, Watchdog Timer Wake-up, or
through an interrupt. Several oscillator options are also
made available to allow the part to fit the application.
The INTRC/EXTRC oscillator option saves system
cost, while the LP crystal option saves power. A set of
configuration bits is used to select various options.
9.1
The configuration bits can be programmed (read as '0'),
or left unprogrammed (read as '1'), to select various
device configurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/configuration memory space (2000h-
3FFFh),
programming.
Configuration Bits
which
can
be
bit0
PIC16C433
accessed
Register:
Address
DS41139A-page 49
only
CONFIG
2007h
during