ATA6612P-PLQW Atmel, ATA6612P-PLQW Datasheet - Page 167
ATA6612P-PLQW
Manufacturer Part Number
ATA6612P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLQW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA6612P-PLQW
Manufacturer:
UPI
Quantity:
230
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6.15.5.1
9111H–AUTO–01/11
Compare Output Mode and Waveform Generation
Figure 6-56. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2x) from the Waveform
Generator if either of the COM2x1:0 bits are set. However, the OC2x pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC2x pin (DDR_OC2x) must be set as output before the OC2x value is
visible on the pin. The port override function is independent of the Waveform Generation
mode.
The design of the Output Compare pin logic allows initialization of the OC2x state before the
output is enabled. Note that some COM2x1:0 bit settings are reserved for certain modes of
operation (see
The Waveform Generator uses the COM2x1:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM2x1:0 = 0 tells the Waveform Generator that no action
on the OC2x Register is to be performed on the next compare match. For compare output
actions in the non-PWM modes refer to
Table 6-62 on page
A change of the COM2x1:0 bits state will have effect at the first compare match after the bits
are written. For non-PWM modes, the action can be forced to have immediate effect by using
the FOC2x strobe bits.
COMnx1
COMnx0
FOCnx
clk
I/O
“8-bit Timer/Counter Register Description” on page
175, and for phase correct PWM refer to
Waveform
Generator
Table 6-61 on page
D
D
PORT
D
OCnx
DDR
Atmel ATA6612/ATA6613
Q
Q
Q
175. For fast PWM mode, refer to
1
0
Table 6-63 on page
174).
OCnx
Pin
176.
167
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